- Sep 29, 2023
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Jonathan Bell authored
Parse devicetree for a charger voltage and apply it. If nonzero and a valid voltage, the firmware will enable charging, otherwise the charger circuit is disabled. Add sysfs attributes to read back the supported charge voltage range, the measured battery voltage, and the charger setpoint. Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
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Jonathan Bell authored
Add property for bcm2712 firmware RTC driver charger control Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
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Phil Elwell authored
Raspberry Pi 5s have a power/suspend button that is only accessible to the firmware. Add a driver to read it and generate key events. Signed-off-by: Phil Elwell <phil@raspberrypi.com>
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Phil Elwell authored
Add bindings for the firmware-based button driver. Signed-off-by: Phil Elwell <phil@raspberrypi.com>
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Phil Elwell authored
Add bindings for the firmware-based button driver. Signed-off-by: Phil Elwell <phil@raspberrypi.com>
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Nick Hollinghurst authored
The delay seems to be required to reliably read model ID. (The same delay is already used when starting the camera.) Signed-off-by: Nick Hollinghurst <nick.hollinghurst@raspberrypi.com>
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Phil Elwell authored
Some platforms include a fan-speed register that reports RPM directly as an alternative to counting interrupts from the fan tachometer input. Add support for reading a register at a given offset (rpm-offset) within a block declared in another node (rpm-regmap). This indirection allows the usual address mapping to be performed, and for address sharing with another driver. Signed-off-by: Phil Elwell <phil@raspberrypi.com>
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Dom Cobley authored
Add binding for the new RTC driver for Raspberry Pi. This platform has an RTC managed by firmware, and this RTC driver provides the simple mailbox interface to access it. Signed-off-by: Dom Cobley <popcornmix@gmail.com>
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Dom Cobley authored
This supports setting and reading the real time clock and supports wakeup alarms. To support wake up alarms you want this bootloader config: POWER_OFF_ON_HALT=1 WAKE_ON_GPIO=0 You can test with: echo +600 | sudo tee /sys/class/rtc/rtc0/wakealarm sudo halt That will halt (in an almost no power state), then wake and restart after 10 minutes. Signed-off-by: Dom Cobley <popcornmix@gmail.com>
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Dom Cobley authored
We currently see these regularly: [ 25.157560] irq 31, desc: 00000000c15e6d2c, depth: 0, count: 0, unhandled: 0 [ 25.164658] ->handle_irq(): 00000000b1775675, brcmstb_l2_intc_irq_handle+0x0/0x1a8 [ 25.172352] ->irq_data.chip(): 00000000fea59f1c, gic_chip_mode1+0x0/0x108 [ 25.179166] ->action(): 000000003eda6d6f [ 25.183096] ->action->handler(): 000000002c09e646, bad_chained_irq+0x0/0x58 [ 25.190084] IRQ_LEVEL set [ 25.193142] IRQ_NOPROBE set [ 25.196198] IRQ_NOREQUEST set [ 25.199255] IRQ_NOTHREAD set with: $ cat /proc/interrupts | grep 31: 31: 1 0 0 0 GICv2 129 Level (null) The interrupt is described in DT with IRQ_TYPE_LEVEL_HIGH But the current compatible string uses the controller in edge triggered mode (as that config matches our register layout). Add a new compatible structure for level driven interrupt with our register layout. We had already been using this compatible string in device tree, so no change needed there. Signed-off-by: Dom Cobley <popcornmix@gmail.com>
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Nick Hollinghurst authored
Add a driver for BCM2712 IOMMUs. There is a small driver for the Shared IOMMU TLB Cache. Each IOMMU instance is a separate device. IOMMUs are set up with a "pass-through" range covering the lowest 40BGytes (which should cover all of SDRAM) for the benefit of non-IOMMU-aware devices that share a physical IOMMU; and translation for addresses in the range 40GB to 42GB. An optional parameter adds a DMA offset (which otherwise would be lost?) to virtual addresses for DMA masters on a bus such as PCIe. Signed-off-by: Nick Hollinghurst <nick.hollinghurst@raspberrypi.com>
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Dom Cobley authored
The previous commit broke support on older devices. Make the breaking parts of patch conditional on the device being used. Fixes: 6e1856ac7c39 ("dmaengine: bcm2835: HACK: Support DMA-Lite channels") Signed-off-by: Dom Cobley <popcornmix@gmail.com>
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Dom Cobley authored
As the shifted address also applies to bcm2712, give the function a more specific name. Signed-off-by: Dom Cobley <popcornmix@gmail.com>
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Jonathan Bell authored
It's really a function of the board whether or not to use this feature as it may require MAC compatibility as well as interop testing. Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
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Maxime Ripard authored
BCM2712 has an extra clock exposed by the firmware called DISP, and used by (at least) the HVS. Let's add it to the list of clocks to register in Linux. Signed-off-by: Maxime Ripard <maxime@cerno.tech>
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Maxime Ripard authored
The BCM2712 has a DMA-Lite controller that is basically a BCM2835-style DMA controller that supports 40 bits DMA addresses. We need it for HDMI audio to work, but this breaks BCM2835-38 so we should rework this later. Signed-off-by: Maxime Ripard <maxime@cerno.tech>
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Phil Elwell authored
BCM2712 has 6 40-bit channels - DMA6 to DMA11. Add a new compatible string to indicate that the current platform is BCM2712. Signed-off-by: Phil Elwell <phil@raspberrypi.com>
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Jonathan Bell authored
The SAR ADC architecture may complete a conversion but instability in the comparator can corrupt the result. Such corruption is signalled in the CS ERR bit, asserted alongside each conversion result. Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
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Jonathan Bell authored
This functionality is now provided by raspberrypi-gpiomem. Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
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Dave Stevenson authored
This wants to be merged before "drivers: char: delete bcm2835-gpiomem" Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
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Jonathan Bell authored
Based on bcm2835-gpiomem. We allow export of the "GPIO registers" to userspace via a chardev as this allows for finer access control (e.g. users must be group gpio, root not required). This driver allows access to either rp1-gpiomem or gpiomem, depending on which nodes are populated in devicetree. RP1 has a different look-and-feel to BCM283x SoCs as it has split ranges for IO controls and the parallel registered OE/IN/OUT access. To handle this, the driver concatenates the ranges for an IO bank and the corresponding RIO instance into a contiguous buffer. Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
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Iago Toral Quiroga authored
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Phil Elwell authored
The built-in MMU driver went most of the way towards supporting larger kernel pages, but dropped the ball when it comes to calculating indexes into the page table. Fix it. Signed-off-by: Phil Elwell <phil@raspberrypi.com>
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Iago Toral Quiroga authored
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Iago Toral Quiroga authored
V3D t.x takes a new parameter to configure TFU jobs that needs to be provided by user space.
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Iago Toral Quiroga authored
v2: fix kernel panic with debug-fs interface to list registers
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Nick Hollinghurst authored
Formerly the delay was omitted as bit-banged SPI seldom achieved even one Mbit/s; but some modern platforms can run faster, and some SPI devices may need to be clocked slower. Signed-off-by: Nick Hollinghurst <nick.hollinghurst@raspberrypi.com>
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Nick Hollinghurst authored
Formerly, if configured using DT, CS GPIOs were driven from spi.c and it was possible for CS to be asserted (low) *before* starting to drive SCK. CS GPIOs have been brought under control of this driver in both ACPI and DT cases, with a fixup for GPIO polarity. Signed-off-by: Nick Hollinghurst <nick.hollinghurst@raspberrypi.com>
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Phil Elwell authored
BCM2712 has a PM block but neither ASB nor RPIVID_ASB. Use the absence of the "asb" register range to indicate BCM2712 and its different PM register range. Signed-off-by: Phil Elwell <phil@raspberrypi.com>
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Phil Elwell authored
BCM2712 lacks the "asb" and "rpivid_asb" register ranges, but still requires the use of the bcm2835-power driver to reset the V3D block. Signed-off-by: Phil Elwell <phil@raspberrypi.com>
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Phil Elwell authored
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
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Phil Elwell authored
These soundcard drivers don't rely on a specific I2S interface, so remove the dependency declarations. See: https://github.com/raspberrypi/linux-2712/issues/111 Signed-off-by: Phil Elwell <phil@raspberrypi.com>
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Phil Elwell authored
IMO the Synopsys datasheet could be clearer in this area, but it seems that the DMA data ports (DMATX and DMARX) expect left and right samples in alternate writes; if a stereo pair is pushed in a single 32-bit write, the upper half is ignored, leading to double speed audio with a confused stereo image. Make sure the necessary changes happen by updating the DMA configuration data in the hw_params method. The set_bclk_ratio change was made at a time when it looked like it could be causing an error, but I think the division of responsibilities is clearer this way (and the kernel log clearer without the info-level message). Signed-off-by: Phil Elwell <phil@raspberrypi.com>
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Phil Elwell authored
Disabling the I2S interface with outstanding transfers prevents the DMAC from shutting down, so keep it partially active after a stop. Signed-off-by: Phil Elwell <phil@raspberrypi.com>
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Phil Elwell authored
Add control of the DMACR register, which is required for paced DMA (i.e. DREQ) support. Signed-off-by: Phil Elwell <phil@raspberrypi.com>
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Phil Elwell authored
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
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Phil Elwell authored
The hardware configuration determines the maximum-supported sample size for each channel, but TCRx allows smaller sizes to be specified at run time. Include the smaller supported sizes in the formats array. Signed-off-by: Phil Elwell <phil@raspberrypi.com>
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Phil Elwell authored
Add optional properties to tune the AXI interface - cdns,aw2w-max-pipe, cdns,ar2r-max-pipe and cdns,use-aw2b-fill. Signed-off-by: Phil Elwell <phil@raspberrypi.com>
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Naushir Patuck authored
Signed-off-by: Naushir Patuck <naush@raspberrypi.com>
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Naushir Patuck authored
Signed-off-by: Naushir Patuck <naush@raspberrypi.com>
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