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  1. Sep 11, 2018
    • Linus Walleij's avatar
      gpio: of: Handle SPI chipselect legacy bindings · 6953c57a
      Linus Walleij authored
      
      
      The SPI chipselects are assumed to be active low in the current
      binding, so when we want to use GPIO descriptors and handle
      the active low/high semantics in gpiolib, we need a special
      parsing quirk to deal with this.
      
      We check for the property "spi-cs-high" and if that is
      NOT present we assume the CS line is active low.
      
      If the line is tagged as active low in the device tree and
      has no "spi-cs-high" property all is fine, the device
      tree and the SPI bindings are in agreement.
      
      If the line is tagged as active high in the device tree with
      the second cell flag and has no "spi-cs-high" property we
      enforce active low semantics (as this is the exception we can
      just tag on the flag).
      
      If the line is tagged as active low with the second cell flag
      AND tagged with "spi-cs-high" the SPI active high property
      takes precedence and we print a warning.
      
      Cc: Mark Brown <broonie@kernel.org>
      Cc: linux-spi@vger.kernel.org
      Cc: Geert Uytterhoeven <geert@linux-m68k.org>
      Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
      6953c57a
  2. Sep 10, 2018
  3. Sep 04, 2018
  4. Aug 31, 2018
  5. Aug 30, 2018
    • Justin Chen's avatar
      gpio: brcmstb: allow 0 width GPIO banks · bfba223d
      Justin Chen authored
      
      
      Sometimes we have empty banks within the GPIO block. This commit allows
      proper handling of 0 width GPIO banks. We handle 0 width GPIO banks by
      incrementing the bank and number of GPIOs, but not initializing them.
      This will mean a call into the non-existent GPIOs will return an error.
      
      Also remove "GPIO registered" dev print. This information is misleading
      since the incremented banks and gpio_base do not reflect the actual GPIOs
      that get initialized. We leave this information out since it is already
      printed with dev_dbg.
      
      Signed-off-by: default avatarJustin Chen <justinpopo6@gmail.com>
      Acked-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
      Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
      bfba223d
    • Linus Walleij's avatar
      gpio: ftgpio: Support debounce timer · 36f3f19a
      Linus Walleij authored
      
      
      The FTGPIO010 has a debounce timer or rather prescaler that
      will affect interrupts fireing off the block. We can support
      this to get proper debounce on e.g. keypresses.
      
      Since the same prescaler is used across all GPIO lines of
      the silicon block, we need to bail out if the prescaler is
      already set and in use by another line.
      
      If the prescaler is already set to what we need, fine, we
      reuse it. This happens more often than not when the same
      debounce time is set for several GPIO keys, so we support
      that usecase easily with this code.
      
      Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
      36f3f19a
    • Linus Walleij's avatar
      gpio: ftgpio: Support optional silicon clock · da02d794
      Linus Walleij authored
      
      
      The GPIO silicon is clocked with a PCLK (peripheral clock)
      on all systems, however not all platforms model it and include
      it in e.g. the device tree, so add clock handling but make it
      optional so we bail out safely if it is e.g. always on.
      
      Reviewed-by: default avatarAndrew Lunn <andrew@lunn.ch>
      Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
      da02d794
  6. Aug 29, 2018