- Mar 17, 2021
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Roi Dayan authored
We will re-use the native NIC port net device instance for the Uplink representor. While changing profiles private resources are not available but some ndos are not checking if the netdev is present. So for those ndos check the netdev is present in the driver before accessing the private resources. Signed-off-by:
Roi Dayan <roid@nvidia.com> Signed-off-by:
Saeed Mahameed <saeedm@nvidia.com>
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Roi Dayan authored
Remove dedicated uplink rep netdev ndos and ethtools ops. We will re-use the native NIC port net device instance and ethtool ops for the Uplink representor. Signed-off-by:
Roi Dayan <roid@nvidia.com> Signed-off-by:
Saeed Mahameed <saeedm@nvidia.com>
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Roi Dayan authored
We will re-use the native NIC port net device instance for the Uplink representor, hence same ndos must be used. Signed-off-by:
Roi Dayan <roid@nvidia.com> Reviewed-by:
Saeed Mahameed <saeedm@nvidia.com> Signed-off-by:
Saeed Mahameed <saeedm@nvidia.com>
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Roi Dayan authored
We will re-use the native NIC port net device instance for the Uplink representor, hence same ndos will be used. Now we need to distinguish in the TC callback if the mode is legacy or switchdev and set the proper flag. Signed-off-by:
Roi Dayan <roid@nvidia.com> Reviewed-by:
Saeed Mahameed <saeedm@nvidia.com> Signed-off-by:
Saeed Mahameed <saeedm@nvidia.com>
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Roi Dayan authored
We will re-use the native NIC port net device instance for the Uplink representor. Several VF ndo ops are not relevant in switchdev mode. Disallow them when eswitch mode is not legacy as a preparation. Signed-off-by:
Roi Dayan <roid@nvidia.com> Reviewed-by:
Parav Pandit <parav@nvidia.com> Signed-off-by:
Saeed Mahameed <saeedm@nvidia.com>
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Saeed Mahameed authored
In downstream patches NIC netdev can change profile dynamically from NIC mode to uplink mode and vise-versa. It is required that both profiles must advertise the same max amount of tx/rx queues. Signed-off-by:
Saeed Mahameed <saeedm@nvidia.com> Reviewed-by:
Roi Dayan <roid@nvidia.com>
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Roi Dayan authored
Not all ndos check the present bit before calling the ndo and the driver may want to check it. Sometimes the dev parameter passed as const so we pass it to netif_device_present() as const. Since netif_device_present() doesn't modify dev parameter anyway, declare it as const. Signed-off-by:
Roi Dayan <roid@nvidia.com> Signed-off-by:
Saeed Mahameed <saeedm@nvidia.com>
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DENG Qingfang authored
Support port MDB and bridge flag operations. As the hardware can manage multicast forwarding itself, offload_fwd_mark can be unconditionally set to true. Signed-off-by:
DENG Qingfang <dqfext@gmail.com> Reviewed-by:
Vladimir Oltean <olteanv@gmail.com> Signed-off-by:
David S. Miller <davem@davemloft.net>
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David S. Miller authored
Álvaro Fernández Rojas says: ==================== net: mdio: Add BCM6368 MDIO mux bus controller This controller is present on BCM6318, BCM6328, BCM6362, BCM6368 and BCM63268 SoCs. v2: add changes suggested by Andrew Lunn and Jakub Kicinski. ==================== Signed-off-by:
David S. Miller <davem@davemloft.net>
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Álvaro Fernández Rojas authored
This controller is present on BCM6318, BCM6328, BCM6362, BCM6368 and BCM63268 SoCs. Signed-off-by:
Álvaro Fernández Rojas <noltari@gmail.com> Signed-off-by:
David S. Miller <davem@davemloft.net>
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Álvaro Fernández Rojas authored
Add documentations for bcm6368 mdio mux driver. Signed-off-by:
Álvaro Fernández Rojas <noltari@gmail.com> Signed-off-by:
David S. Miller <davem@davemloft.net>
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Xie He authored
There are two "netif_running" checks in this driver. One is in "lapbeth_xmit" and the other is in "lapbeth_rcv". They serve to make sure that the LAPB APIs called in these functions are called before "lapb_unregister" is called by the "ndo_stop" function. However, these "netif_running" checks are unreliable, because it's possible that immediately after "netif_running" returns true, "ndo_stop" is called (which causes "lapb_unregister" to be called). This patch adds locking to make sure "lapbeth_xmit" and "lapbeth_rcv" can reliably check and ensure the netif is running while doing their work. Fixes: 1da177e4 ("Linux-2.6.12-rc2") Signed-off-by:
Xie He <xie.he.0141@gmail.com> Acked-by:
Martin Schiller <ms@dev.tdt.de> Signed-off-by:
David S. Miller <davem@davemloft.net>
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David S. Miller authored
Alex Elder says: ==================== net: ipa: QMI fixes Mani Sadhasivam discovered some errors in the definitions of some QMI messages used for IPA. This series addresses those errors, and extends the definition of one message type to include some newly-defined fields. ==================== Signed-off-by:
David S. Miller <davem@davemloft.net>
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Alex Elder authored
The specified format of the INDICATION_REGISTER QMI request message has been extended to support two more optional fields: endpoint_desc_ind: sender wishes to receive endpoint descriptor information via an IPA ENDP_DESC indication QMI message bw_change_ind: sender wishes to receive bandwidth change information via an IPA BW_CHANGE indication QMI message Add definitions that permit these fields to be formatted and parsed by the QMI library code. Signed-off-by:
Alex Elder <elder@linaro.org> Acked-by:
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by:
David S. Miller <davem@davemloft.net>
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Alex Elder authored
The ipa_init_modem_driver_req_ei[] encoding array for the INIT_MODEM_DRIVER request message has some errors in it. First, the tlv_type associated with the hw_stats_quota_size field is wrong; it duplicates the valiue used for the hw_stats_quota_base_addr field (0x1f) and should use 0x20 instead. The tlv_type value for the hw_stats_drop_size field also uses the same duplicate value; it should use 0x22 instead. Second, there is no definition for the hw_stats_drop_base_addr field. It is an optional 32-bit enumerated type value. Finally, the hw_stats_quota_base_addr, hw_stats_quota_size, and hw_stats_drop_size fields are defined as enumerated types; they should be unsigned 4-byte values. Reported-by:
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by:
Alex Elder <elder@linaro.org> Acked-by:
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by:
David S. Miller <davem@davemloft.net>
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Alex Elder authored
In the ipa_indication_register_req_ei[] encoding array, the tlv_type associated with the ipa_mhi_ready_ind field is wrong. It duplicates the value used for the data_usage_quota_reached field (0x11) and should use value 0x12 instead. Fix this bug. Reported-by:
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by:
Alex Elder <elder@linaro.org> Acked-by:
Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by:
David S. Miller <davem@davemloft.net>
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Wei Yongjun authored
The return value 'rc' maybe overwrite to 0 in the flow_action_for_each loop, the error code from the offload not support error handling will not set. This commit fix it to return -EOPNOTSUPP. Fixes: 6a56e199 ("flow_offload: reject configuration of packet-per-second policing in offload drivers") Reported-by:
Hulk Robot <hulkci@huawei.com> Signed-off-by:
Wei Yongjun <weiyongjun1@huawei.com> Reviewed-by:
Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by:
Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by:
David S. Miller <davem@davemloft.net>
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Álvaro Fernández Rojas authored
Add missing of_match_table to allow device tree probing. Signed-off-by:
Álvaro Fernández Rojas <noltari@gmail.com> Signed-off-by:
David S. Miller <davem@davemloft.net>
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Calvin Johnson authored
Alphabetically sort header inclusion Signed-off-by:
Calvin Johnson <calvin.johnson@oss.nxp.com> Signed-off-by:
David S. Miller <davem@davemloft.net>
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- Mar 16, 2021
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David S. Miller authored
Shannon Nelson says: ==================== ionic Tx updates Just as the Rx path recently got a face lift, it is time for the Tx path to get some attention. The original TSO-to-descriptor mapping was ugly and convoluted and needed some deep work. This series pulls the dma mapping out of the descriptor frag mapping loop and makes the dma mapping more generic for use in the non-TSO case. ==================== Signed-off-by:
David S. Miller <davem@davemloft.net>
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Shannon Nelson authored
Gather the Tx packet and byte counts and call netdev_tx_completed_queue() only once per clean cycle. Signed-off-by:
Shannon Nelson <snelson@pensando.io> Signed-off-by:
David S. Miller <davem@davemloft.net>
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Shannon Nelson authored
The descriptor mappings are set up the same way whether or not it is a TSO, so we don't need separate logic for the two cases. Signed-off-by:
Shannon Nelson <snelson@pensando.io> Signed-off-by:
David S. Miller <davem@davemloft.net>
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Shannon Nelson authored
Make the new ionic_tx_map_tso() usable by the non-TSO paths, and pull the call up a level into ionic_tx() before calling the csum or no-csum routines. Signed-off-by:
Shannon Nelson <snelson@pensando.io> Signed-off-by:
David S. Miller <davem@davemloft.net>
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Shannon Nelson authored
One issue with the original TSO code was that it was working too hard to deal with skb layouts that were never going to show up, such as an skb->data that was longer than a single descriptor's length. The other issue was trying to arrange the fragment dma mapping at the same time as figuring out the descriptors needed. There was just too much going on at the same time. Now we do the dma mapping first, which sets up the buffers with skb->data in buf[0] and the remaining frags in buf[1..n-1]. Next we spread the bufs across the descriptors needed, where each descriptor gets up to mss number of bytes. Signed-off-by:
Shannon Nelson <snelson@pensando.io> Signed-off-by:
David S. Miller <davem@davemloft.net>
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David S. Miller authored
Alex Elder says: ==================== net: qualcomm: rmnet: stop using C bit-fields Version 6 is the same as version 5, but has been rebased on updated net-next/master. With any luck, the patches I'm sending out this time won't contain garbage. Version 5 of this series responds to a suggestion made by Alexander Duyck, to determine the offset to the checksummed range of a packet using skb_network_header_len() on patch 2. I have added his Reviewed-by tag to all (other) patches, and removed Bjorn's from patch 2. The change required some updates to the subsequent patches, and I reordered some assignments in a minor way in the last patch. I don't expect any more discussion on this series (but will respond if there is any). So at this point I would really appreciate it if KS and/or Sean would offer a review, or at least acknowledge it. I presume you two are able to independently test the code as well, so I request that, and hope you are willing to do so. Version 4 of this series is here: https://lore.kernel.org/netdev/20210315133455.1576188-1-elder@linaro.org ==================== Signed-off-by:
David S. Miller <davem@davemloft.net>
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Alex Elder authored
Replace the use of C bit-fields in the rmnet_map_ul_csum_header structure with a single two-byte (big endian) structure member, and use masks to encode or get values within it. The content of these fields can be accessed using simple bitwise AND and OR operations on the (host byte order) value of the new structure member. Previously rmnet_map_ipv4_ul_csum_header() would update C bit-field values in host byte order, then forcibly fix their byte order using a combination of byte swap operations and types. Instead, just compute the value that needs to go into the new structure member and save it with a simple byte-order conversion. Make similar simplifications in rmnet_map_ipv6_ul_csum_header(). Finally, in rmnet_map_checksum_uplink_packet() a set of assignments zeroes every field in the upload checksum header. Replace that with a single memset() operation. Signed-off-by:
Alex Elder <elder@linaro.org> Reviewed-by:
Alexander Duyck <alexanderduyck@fb.com> Signed-off-by:
David S. Miller <davem@davemloft.net>
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Alex Elder authored
Replace the use of C bit-fields in the rmnet_map_dl_csum_trailer structure with a single one-byte field, using constant field masks to encode or get at embedded values. Signed-off-by:
Alex Elder <elder@linaro.org> Reviewed-by:
Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by:
Alexander Duyck <alexanderduyck@fb.com> Signed-off-by:
David S. Miller <davem@davemloft.net>
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Alex Elder authored
The actual layout of bits defined in C bit-fields (e.g. int foo : 3) is implementation-defined. Structures defined in <linux/if_rmnet.h> address this by specifying all bit-fields twice, to cover two possible layouts. I think this pattern is repetitive and noisy, and I find the whole notion of compiler "bitfield endianness" to be non-intuitive. Stop using C bit-fields for the command/data flag and the pad length fields in the rmnet_map structure, and define a single-byte flags field instead. Define a mask for the single-bit "command" flag, and another mask for the encoded pad length. The content of both fields can be accessed using a simple bitwise AND operation. Signed-off-by:
Alex Elder <elder@linaro.org> Reviewed-by:
Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by:
Alexander Duyck <alexanderduyck@fb.com> Signed-off-by:
David S. Miller <davem@davemloft.net>
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Alex Elder authored
The following macros, defined in "rmnet_map.h", assume a socket buffer is provided as an argument without any real indication this is the case. RMNET_MAP_GET_MUX_ID() RMNET_MAP_GET_CD_BIT() RMNET_MAP_GET_PAD() RMNET_MAP_GET_CMD_START() RMNET_MAP_GET_LENGTH() What they hide is pretty trivial accessing of fields in a structure, and it's much clearer to see this if we do these accesses directly. So rather than using these accessor macros, assign a local variable of the map header pointer type to the socket buffer data pointer, and derereference that pointer variable. In "rmnet_map_data.c", use sizeof(object) rather than sizeof(type) in one spot. Also, there's no need to byte swap 0; it's all zeros irrespective of endianness. Signed-off-by:
Alex Elder <elder@linaro.org> Reviewed-by:
Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by:
Alexander Duyck <alexanderduyck@fb.com> Signed-off-by:
David S. Miller <davem@davemloft.net>
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Alex Elder authored
In rmnet_map_ipv4_ul_csum_header() and rmnet_map_ipv6_ul_csum_header() the offset within a packet at which checksumming should commence is calculated. This calculation involves byte swapping and a forced type conversion that makes it hard to understand. Simplify this by computing the offset in host byte order, then converting the result when assigning it into the header field. Signed-off-by:
Alex Elder <elder@linaro.org> Signed-off-by:
David S. Miller <davem@davemloft.net>
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Alex Elder authored
The fields in the checksum trailer structure used for QMAP protocol RX packets are all big-endian format, so define them that way. It turns out these fields are never actually used by the RMNet code. The start offset is always assumed to be zero, and the length is taken from the other packet headers. So making these fields explicitly big endian has no effect on the behavior of the code. Signed-off-by:
Alex Elder <elder@linaro.org> Reviewed-by:
Bjorn Andersson <bjorn.andersson@linaro.org> Reviewed-by:
Alexander Duyck <alexanderduyck@fb.com> Signed-off-by:
David S. Miller <davem@davemloft.net>
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Alex Elder authored
In review, Alexander Duyck suggested that ipa_table_hash_support() was trivial enough that it could be implemented as a static inline function in the header file. But the patch had already been accepted. Implement his suggestion. Signed-off-by:
Alex Elder <elder@linaro.org> Reviewed-by:
Alexander Duyck <alexanderduyck@fb.com> Signed-off-by:
David S. Miller <davem@davemloft.net>
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Ivan Bornyakov authored
Add basic support for the Marvell 88X2222 multi-speed ethernet transceiver. This PHY provides data transmission over fiber-optic as well as Twinax copper links. The 88X2222 supports 2 ports of 10GBase-R and 1000Base-X on the line-side interface. The host-side interface supports 4 ports of 10GBase-R, RXAUI, 1000Base-X and 2 ports of XAUI. This driver, however, supports only XAUI on the host-side and 1000Base-X/10GBase-R on the line-side, for now. The SGMII is also supported over 1000Base-X. Interrupts are not supported. Internal registers access compliant with the Clause 45 specification. Signed-off-by:
Ivan Bornyakov <i.bornyakov@metrotek.ru> Signed-off-by:
David S. Miller <davem@davemloft.net>
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David S. Miller authored
Joakim Zhang says: ==================== net: stmmac: implement clocks management This patch set tries to implement clocks management, and takes i.MX platform as an example. --- ChangeLogs: V1->V2: * change to pm runtime mechanism. * rename function: _enable() -> _config() * take MDIO bus into account, it needs clocks when interface is closed. * reverse Christmass tree. V2->V3: * slightly simple the code according to Andrew's suggesstion and also add tag: Reviewed-by: Andrew Lunn <andrew@lunn.ch> ==================== Signed-off-by:
David S. Miller <davem@davemloft.net>
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Joakim Zhang authored
Split clocks settings from init callback into clks_config callback, which could support platform level clocks management. Reviewed-by:
Andrew Lunn <andrew@lunn.ch> Signed-off-by:
Joakim Zhang <qiangqing.zhang@nxp.com> Signed-off-by:
David S. Miller <davem@davemloft.net>
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Joakim Zhang authored
This patch intends to add platform level clocks management. Some platforms may have their own special clocks, they also need to be managed dynamically. If you want to manage such clocks, please implement clks_config callback. Reviewed-by:
Andrew Lunn <andrew@lunn.ch> Signed-off-by:
Joakim Zhang <qiangqing.zhang@nxp.com> Signed-off-by:
David S. Miller <davem@davemloft.net>
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Joakim Zhang authored
This patch intends to add clocks management for stmmac driver: If CONFIG_PM enabled: 1. Keep clocks disabled after driver probed. 2. Enable clocks when up the net device, and disable clocks when down the net device. If CONFIG_PM disabled: Keep clocks always enabled after driver probed. Note: 1. It is fine for ethtool, since the way of implementing ethtool_ops::begin in stmmac is only can be accessed when interface is enabled, so the clocks are ticked. 2. The MDIO bus has a different life cycle to the MAC, need ensure clocks are enabled when _mdio_read/write() need clocks, because these functions can be called while the interface it not opened. Reviewed-by:
Andrew Lunn <andrew@lunn.ch> Signed-off-by:
Joakim Zhang <qiangqing.zhang@nxp.com> Signed-off-by:
David S. Miller <davem@davemloft.net>
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David S. Miller authored
Ong Boon Leong says: ==================== net: pcs, stmmac: add C37 AN SGMII support This patch series adds MAC-side SGMII support to stmmac driver and it is changed as follow:- 1/6: Refactor the current C73 implementation in pcs-xpcs to prepare for adding C37 AN later. 2/6: Add MAC-side SGMII C37 AN support to pcs-xpcs 3,4/6: make phylink_parse_mode() to work for non-DT platform so that we can use stmmac platform_data to set it. 5/6: Make stmmac_open() to only skip PHY init if C73 is used, otherwise C37 AN will need phydev to be connected to phylink. 6/6: Finally, add pcs-xpcs SGMII interface support to Intel mGbE controller. The patch series have been tested on EHL CRB PCH TSN (eth2) controller that has Marvell 88E1512 PHY attached over SGMII interface and the iterative tests of speed change (AN) + ping test have been successful. [63446.009295] intel-eth-pci 0000:00:1e.4 eth2: Link is Down [63449.986365] intel-eth-pci 0000:00:1e.4 eth2: Link is Up - 1Gbps/Full - flow control off [63449.987625] IPv6: ADDRCONF(NETDEV_CHANGE): eth2: link becomes ready [63451.248064] intel-eth-pci 0000:00:1e.4 eth2: Link is Down [63454.082366] intel-eth-pci 0000:00:1e.4 eth2: Link is Up - 100Mbps/Full - flow control off [63454.083650] IPv6: ADDRCONF(NETDEV_CHANGE): eth2: link becomes ready [63456.465179] intel-eth-pci 0000:00:1e.4 eth2: Link is Down [63459.202367] intel-eth-pci 0000:00:1e.4 eth2: Link is Up - 10Mbps/Full - flow control off [63459.203639] IPv6: ADDRCONF(NETDEV_CHANGE): eth2: link becomes ready [63460.882832] intel-eth-pci 0000:00:1e.4 eth2: Link is Down [63464.322366] intel-eth-pci 0000:00:1e.4 eth2: Link is Up - 1Gbps/Full - flow control off ==================== Signed-off-by:
David S. Miller <davem@davemloft.net>
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Ong Boon Leong authored
Intel mGbE controller such as those in EHL & TGL uses pcs-xpcs driver for SGMII interface. To ensure mdio bus scanning does not assign phy_device to MDIO-addressable entities like intel serdes and pcs-xpcs, we set up to phy_mask to skip them. Signed-off-by:
Ong Boon Leong <boon.leong.ong@intel.com> Signed-off-by:
David S. Miller <davem@davemloft.net>
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Ong Boon Leong authored
As the support for MAC-side SGMII C37 AN is added to pcs-xpcs, phydev should be attached to phylink during driver's open(). So, we change the condition to "Not C73 AN" instead. Signed-off-by:
Ong Boon Leong <boon.leong.ong@intel.com> Signed-off-by:
David S. Miller <davem@davemloft.net>
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