- Sep 29, 2023
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Jonathan Bell authored
Based on bcm2835-gpiomem. We allow export of the "GPIO registers" to userspace via a chardev as this allows for finer access control (e.g. users must be group gpio, root not required). This driver allows access to either rp1-gpiomem or gpiomem, depending on which nodes are populated in devicetree. RP1 has a different look-and-feel to BCM283x SoCs as it has split ranges for IO controls and the parallel registered OE/IN/OUT access. To handle this, the driver concatenates the ranges for an IO bank and the corresponding RIO instance into a contiguous buffer. Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
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Iago Toral Quiroga authored
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Phil Elwell authored
The built-in MMU driver went most of the way towards supporting larger kernel pages, but dropped the ball when it comes to calculating indexes into the page table. Fix it. Signed-off-by: Phil Elwell <phil@raspberrypi.com>
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Iago Toral Quiroga authored
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Iago Toral Quiroga authored
V3D t.x takes a new parameter to configure TFU jobs that needs to be provided by user space.
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Iago Toral Quiroga authored
v2: fix kernel panic with debug-fs interface to list registers
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Nick Hollinghurst authored
Formerly the delay was omitted as bit-banged SPI seldom achieved even one Mbit/s; but some modern platforms can run faster, and some SPI devices may need to be clocked slower. Signed-off-by: Nick Hollinghurst <nick.hollinghurst@raspberrypi.com>
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Nick Hollinghurst authored
Formerly, if configured using DT, CS GPIOs were driven from spi.c and it was possible for CS to be asserted (low) *before* starting to drive SCK. CS GPIOs have been brought under control of this driver in both ACPI and DT cases, with a fixup for GPIO polarity. Signed-off-by: Nick Hollinghurst <nick.hollinghurst@raspberrypi.com>
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Phil Elwell authored
BCM2712 has a PM block but neither ASB nor RPIVID_ASB. Use the absence of the "asb" register range to indicate BCM2712 and its different PM register range. Signed-off-by: Phil Elwell <phil@raspberrypi.com>
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Phil Elwell authored
BCM2712 lacks the "asb" and "rpivid_asb" register ranges, but still requires the use of the bcm2835-power driver to reset the V3D block. Signed-off-by: Phil Elwell <phil@raspberrypi.com>
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Phil Elwell authored
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
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Phil Elwell authored
These soundcard drivers don't rely on a specific I2S interface, so remove the dependency declarations. See: https://github.com/raspberrypi/linux-2712/issues/111 Signed-off-by: Phil Elwell <phil@raspberrypi.com>
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Phil Elwell authored
IMO the Synopsys datasheet could be clearer in this area, but it seems that the DMA data ports (DMATX and DMARX) expect left and right samples in alternate writes; if a stereo pair is pushed in a single 32-bit write, the upper half is ignored, leading to double speed audio with a confused stereo image. Make sure the necessary changes happen by updating the DMA configuration data in the hw_params method. The set_bclk_ratio change was made at a time when it looked like it could be causing an error, but I think the division of responsibilities is clearer this way (and the kernel log clearer without the info-level message). Signed-off-by: Phil Elwell <phil@raspberrypi.com>
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Phil Elwell authored
Disabling the I2S interface with outstanding transfers prevents the DMAC from shutting down, so keep it partially active after a stop. Signed-off-by: Phil Elwell <phil@raspberrypi.com>
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Phil Elwell authored
Add control of the DMACR register, which is required for paced DMA (i.e. DREQ) support. Signed-off-by: Phil Elwell <phil@raspberrypi.com>
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Phil Elwell authored
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
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Phil Elwell authored
The hardware configuration determines the maximum-supported sample size for each channel, but TCRx allows smaller sizes to be specified at run time. Include the smaller supported sizes in the formats array. Signed-off-by: Phil Elwell <phil@raspberrypi.com>
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Phil Elwell authored
Add optional properties to tune the AXI interface - cdns,aw2w-max-pipe, cdns,ar2r-max-pipe and cdns,use-aw2b-fill. Signed-off-by: Phil Elwell <phil@raspberrypi.com>
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Naushir Patuck authored
Signed-off-by: Naushir Patuck <naush@raspberrypi.com>
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Naushir Patuck authored
Signed-off-by: Naushir Patuck <naush@raspberrypi.com>
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Nick Hollinghurst authored
Add support for the RP1 VEC hardware. Signed-off-by: Nick Hollinghurst <nick.hollinghurst@raspberrypi.com>
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Nick Hollinghurst authored
Add support for the RP1 DPI hardware. Signed-off-by: Nick Hollinghurst <nick.hollinghurst@raspberrypi.com>
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Nick Hollinghurst authored
Add support for the RP1 DSI hardware. Signed-off-by: Nick Hollinghurst <nick.hollinghurst@raspberrypi.com>
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Phil Elwell authored
Add a driver for the RP1 PWM block. Signed-off-by: Phil Elwell <phil@raspberrypi.com>
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Phil Elwell authored
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
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Phil Elwell authored
Don't assume that DMA addresses of devices are the same as their physical addresses - convert correctly. The CFG2 register layout is used when there are more than 8 channels, but also when configured for more than 16 target peripheral devices because the index of the handshake signal has to be made wider. Reset the DMAC on probe The driver goes to the trouble of tracking when transfers have been paused, but then doesn't report that state when queried. Not having APB registers is not an error - for most use cases it's not even of interest, it's expected. Demote the message to debug level, which is disabled by default. Each channel has a descriptor pool, which is shared between transfers. It is unsafe to treat the total number of descriptors allocated from a pool as the number allocated to a specific transfer; doing so leads to releasing buffers that shouldn't be released and walking off the ends of descriptor lists. Instead, give each transfer descriptor its own count. Support partial transfers: Some use cases involve streaming from a device where the transfer only proceeds when the device's FIFO occupancy exceeds a certain threshold. In such cases (e.g. when pulling data from a UART) it is important to know how much data has been transferred so far, in order that remaining bytes can be read from the FIFO directly by software. Add the necessary code to provide this "residue" value with a finer, sub-transfer granularity. In order to prevent the occasional byte getting stuck in the DMA controller's internal buffers, restrict the destination memory width to the source register width. Signed-off-by: Phil Elwell <phil@raspberrypi.com>
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Phil Elwell authored
The SMBUS emulation code turns an SMBUS quick command into a zero- length read. This controller can't do zero length accesses, but it can do quick commands, so reverse the emulation. The alternative would be to properly implement the SMBUS support but that is a lot more work, and unnecessary just to get i2cdetect working. Signed-off-by: Phil Elwell <phil@raspberrypi.com>
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Phil Elwell authored
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
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Phil Elwell authored
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
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Liam Fraser authored
Signed-off-by: Liam Fraser <liam@raspberrypi.com>
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Phil Elwell authored
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
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Phil Elwell authored
RP1 exposes GPIOs. Add a pinctrl driver to allow control of those. Signed-off-by: Phil Elwell <phil@raspberrypi.com>
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Phil Elwell authored
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
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Phil Elwell authored
RP1 contains various PLLs and clocks for driving the hardware blocks, so add a driver to configure these. Signed-off-by: Phil Elwell <phil@raspberrypi.com>
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Phil Elwell authored
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
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Phil Elwell authored
RP1 is a multifunction PCIe device that exposes a range of peripherals. Add the parent driver to manage these. Signed-off-by: Phil Elwell <phil@raspberrypi.com>
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Phil Elwell authored
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
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Phil Elwell authored
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Naushir Patuck authored
Signed-off-by: Naushir Patuck <naush@raspberrypi.com>
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Naushir Patuck authored
Signed-off-by: Naushir Patuck <naush@raspberrypi.com>
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