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pcfg_pull_none: pcfg-pull-none {
bias-disable;
};
pcfg_pull_none_12ma: pcfg-pull-none-12ma {
bias-disable;
drive-strength = <12>;
};
pcfg_pull_none_13ma: pcfg-pull-none-13ma {
bias-disable;
drive-strength = <13>;
};
pcfg_pull_none_18ma: pcfg-pull-none-18ma {
bias-disable;
drive-strength = <18>;
};
pcfg_pull_none_20ma: pcfg-pull-none-20ma {
bias-disable;
drive-strength = <20>;
};
pcfg_pull_up_2ma: pcfg-pull-up-2ma {
bias-pull-up;
drive-strength = <2>;
};
pcfg_pull_up_8ma: pcfg-pull-up-8ma {
bias-pull-up;
drive-strength = <8>;
};
pcfg_pull_up_18ma: pcfg-pull-up-18ma {
bias-pull-up;
drive-strength = <18>;
};
pcfg_pull_up_20ma: pcfg-pull-up-20ma {
bias-pull-up;
drive-strength = <20>;
};
pcfg_pull_down_4ma: pcfg-pull-down-4ma {
bias-pull-down;
drive-strength = <4>;
};
pcfg_pull_down_8ma: pcfg-pull-down-8ma {
bias-pull-down;
drive-strength = <8>;
};
pcfg_pull_down_12ma: pcfg-pull-down-12ma {
bias-pull-down;
drive-strength = <12>;
};
pcfg_pull_down_18ma: pcfg-pull-down-18ma {
bias-pull-down;
drive-strength = <18>;
};
pcfg_pull_down_20ma: pcfg-pull-down-20ma {
bias-pull-down;
drive-strength = <20>;
};
pcfg_output_high: pcfg-output-high {
output-high;
};
pcfg_output_low: pcfg-output-low {
output-low;
clock {
clk_32k: clk-32k {
rockchip,pins = <0 RK_PA0 2 &pcfg_pull_none>;
};
};
edp {
edp_hpd: edp-hpd {
rockchip,pins =
<4 RK_PC7 2 &pcfg_pull_none>;
gmac {
rgmii_pins: rgmii-pins {
rockchip,pins =
/* mac_txclk */
<3 RK_PC1 1 &pcfg_pull_none_13ma>,
<3 RK_PB6 1 &pcfg_pull_none>,
<3 RK_PB5 1 &pcfg_pull_none>,
<3 RK_PB4 1 &pcfg_pull_none_13ma>,
<3 RK_PB3 1 &pcfg_pull_none>,
<3 RK_PB1 1 &pcfg_pull_none>,
<3 RK_PB0 1 &pcfg_pull_none>,
<3 RK_PA7 1 &pcfg_pull_none>,
<3 RK_PA6 1 &pcfg_pull_none>,
<3 RK_PA5 1 &pcfg_pull_none_13ma>,
<3 RK_PA4 1 &pcfg_pull_none_13ma>,
<3 RK_PA3 1 &pcfg_pull_none>,
<3 RK_PA2 1 &pcfg_pull_none>,
<3 RK_PA1 1 &pcfg_pull_none_13ma>,
<3 RK_PA0 1 &pcfg_pull_none_13ma>;
};
rmii_pins: rmii-pins {
rockchip,pins =
/* mac_mdio */
<3 RK_PB5 1 &pcfg_pull_none>,
<3 RK_PB4 1 &pcfg_pull_none_13ma>,
<3 RK_PB3 1 &pcfg_pull_none>,
<3 RK_PB2 1 &pcfg_pull_none>,
<3 RK_PB1 1 &pcfg_pull_none>,
<3 RK_PB0 1 &pcfg_pull_none>,
<3 RK_PA7 1 &pcfg_pull_none>,
<3 RK_PA6 1 &pcfg_pull_none>,
<3 RK_PA5 1 &pcfg_pull_none_13ma>,
<3 RK_PA4 1 &pcfg_pull_none_13ma>;
i2c0 {
i2c0_xfer: i2c0-xfer {
rockchip,pins =
<1 RK_PB7 2 &pcfg_pull_none>,
<1 RK_PC0 2 &pcfg_pull_none>;
};
};
i2c1 {
i2c1_xfer: i2c1-xfer {
rockchip,pins =
<4 RK_PA2 1 &pcfg_pull_none>,
<4 RK_PA1 1 &pcfg_pull_none>;
};
};
i2c2 {
i2c2_xfer: i2c2-xfer {
rockchip,pins =
<2 RK_PA1 2 &pcfg_pull_none_12ma>,
<2 RK_PA0 2 &pcfg_pull_none_12ma>;
};
};
i2c3 {
i2c3_xfer: i2c3-xfer {
rockchip,pins =
<4 RK_PC1 1 &pcfg_pull_none>,
<4 RK_PC0 1 &pcfg_pull_none>;
};
};
i2c4 {
i2c4_xfer: i2c4-xfer {
rockchip,pins =
<1 RK_PB4 1 &pcfg_pull_none>,
<1 RK_PB3 1 &pcfg_pull_none>;
};
};
i2c5 {
i2c5_xfer: i2c5-xfer {
rockchip,pins =
<3 RK_PB3 2 &pcfg_pull_none>,
<3 RK_PB2 2 &pcfg_pull_none>;
};
};
i2c6 {
i2c6_xfer: i2c6-xfer {
rockchip,pins =
<2 RK_PB2 2 &pcfg_pull_none>,
<2 RK_PB1 2 &pcfg_pull_none>;
};
};
i2c7 {
i2c7_xfer: i2c7-xfer {
rockchip,pins =
<2 RK_PB0 2 &pcfg_pull_none>,
<2 RK_PA7 2 &pcfg_pull_none>;
};
};
i2c8 {
i2c8_xfer: i2c8-xfer {
rockchip,pins =
<1 RK_PC5 1 &pcfg_pull_none>,
<1 RK_PC4 1 &pcfg_pull_none>;
};
};
i2s0 {
i2s0_2ch_bus: i2s0-2ch-bus {
rockchip,pins =
<3 RK_PD0 1 &pcfg_pull_none>,
<3 RK_PD1 1 &pcfg_pull_none>,
<3 RK_PD2 1 &pcfg_pull_none>,
<3 RK_PD3 1 &pcfg_pull_none>,
<3 RK_PD7 1 &pcfg_pull_none>,
<4 RK_PA0 1 &pcfg_pull_none>;
i2s0_8ch_bus: i2s0-8ch-bus {
rockchip,pins =
<3 RK_PD0 1 &pcfg_pull_none>,
<3 RK_PD1 1 &pcfg_pull_none>,
<3 RK_PD2 1 &pcfg_pull_none>,
<3 RK_PD3 1 &pcfg_pull_none>,
<3 RK_PD4 1 &pcfg_pull_none>,
<3 RK_PD5 1 &pcfg_pull_none>,
<3 RK_PD6 1 &pcfg_pull_none>,
<3 RK_PD7 1 &pcfg_pull_none>,
<4 RK_PA0 1 &pcfg_pull_none>;
};
};
i2s1 {
i2s1_2ch_bus: i2s1-2ch-bus {
rockchip,pins =
<4 RK_PA3 1 &pcfg_pull_none>,
<4 RK_PA4 1 &pcfg_pull_none>,
<4 RK_PA5 1 &pcfg_pull_none>,
<4 RK_PA6 1 &pcfg_pull_none>,
<4 RK_PA7 1 &pcfg_pull_none>;
sdio0 {
sdio0_bus1: sdio0-bus1 {
rockchip,pins =
<2 RK_PC4 1 &pcfg_pull_up>;
};
sdio0_bus4: sdio0-bus4 {
rockchip,pins =
<2 RK_PC4 1 &pcfg_pull_up>,
<2 RK_PC5 1 &pcfg_pull_up>,
<2 RK_PC6 1 &pcfg_pull_up>,
<2 RK_PC7 1 &pcfg_pull_up>;
};
sdio0_cmd: sdio0-cmd {
rockchip,pins =
<2 RK_PD0 1 &pcfg_pull_up>;
};
sdio0_clk: sdio0-clk {
rockchip,pins =
<2 RK_PD1 1 &pcfg_pull_none>;
};
sdio0_cd: sdio0-cd {
rockchip,pins =
<2 RK_PD2 1 &pcfg_pull_up>;
};
sdio0_pwr: sdio0-pwr {
rockchip,pins =
<2 RK_PD3 1 &pcfg_pull_up>;
};
sdio0_bkpwr: sdio0-bkpwr {
rockchip,pins =
<2 RK_PD4 1 &pcfg_pull_up>;
};
sdio0_wp: sdio0-wp {
rockchip,pins =
<0 RK_PA3 1 &pcfg_pull_up>;
};
sdio0_int: sdio0-int {
rockchip,pins =
<0 RK_PA4 1 &pcfg_pull_up>;
};
};
sdmmc {
sdmmc_bus1: sdmmc-bus1 {
rockchip,pins =
<4 RK_PB0 1 &pcfg_pull_up>;
};
sdmmc_bus4: sdmmc-bus4 {
rockchip,pins =
<4 RK_PB0 1 &pcfg_pull_up>,
<4 RK_PB1 1 &pcfg_pull_up>,
<4 RK_PB2 1 &pcfg_pull_up>,
<4 RK_PB3 1 &pcfg_pull_up>;
};
sdmmc_clk: sdmmc-clk {
rockchip,pins =
<4 RK_PB4 1 &pcfg_pull_none>;
};
sdmmc_cmd: sdmmc-cmd {
rockchip,pins =
<4 RK_PB5 1 &pcfg_pull_up>;
};
rockchip,pins =
<0 RK_PA7 1 &pcfg_pull_up>;
};
sdmmc_wp: sdmmc-wp {
rockchip,pins =
<0 RK_PB0 1 &pcfg_pull_up>;
};
};
sleep {
ap_pwroff: ap-pwroff {
rockchip,pins = <1 RK_PA5 1 &pcfg_pull_none>;
};
ddrio_pwroff: ddrio-pwroff {
rockchip,pins = <0 RK_PA1 1 &pcfg_pull_none>;
};
};
spdif {
spdif_bus: spdif-bus {
rockchip,pins =
<4 RK_PC5 1 &pcfg_pull_none>;
spdif_bus_1: spdif-bus-1 {
rockchip,pins =
<3 RK_PC0 3 &pcfg_pull_none>;
};
spi0 {
spi0_clk: spi0-clk {
rockchip,pins =
<3 RK_PA6 2 &pcfg_pull_up>;
};
spi0_cs0: spi0-cs0 {
rockchip,pins =
<3 RK_PA7 2 &pcfg_pull_up>;
};
spi0_cs1: spi0-cs1 {
rockchip,pins =
<3 RK_PB0 2 &pcfg_pull_up>;
};
spi0_tx: spi0-tx {
rockchip,pins =
<3 RK_PA5 2 &pcfg_pull_up>;
};
spi0_rx: spi0-rx {
rockchip,pins =
<3 RK_PA4 2 &pcfg_pull_up>;
};
};
spi1 {
spi1_clk: spi1-clk {
rockchip,pins =
<1 RK_PB1 2 &pcfg_pull_up>;
};
spi1_cs0: spi1-cs0 {
rockchip,pins =
<1 RK_PB2 2 &pcfg_pull_up>;
};
spi1_rx: spi1-rx {
rockchip,pins =
<1 RK_PA7 2 &pcfg_pull_up>;
};
spi1_tx: spi1-tx {
rockchip,pins =
<1 RK_PB0 2 &pcfg_pull_up>;
};
};
spi2 {
spi2_clk: spi2-clk {
rockchip,pins =
<2 RK_PB3 1 &pcfg_pull_up>;
};
spi2_cs0: spi2-cs0 {
rockchip,pins =
<2 RK_PB4 1 &pcfg_pull_up>;
};
spi2_rx: spi2-rx {
rockchip,pins =
<2 RK_PB1 1 &pcfg_pull_up>;
};
spi2_tx: spi2-tx {
rockchip,pins =
<2 RK_PB2 1 &pcfg_pull_up>;
};
};
spi3 {
spi3_clk: spi3-clk {
rockchip,pins =
<1 RK_PC1 1 &pcfg_pull_up>;
};
spi3_cs0: spi3-cs0 {
rockchip,pins =
<1 RK_PC2 1 &pcfg_pull_up>;
};
spi3_rx: spi3-rx {
rockchip,pins =
<1 RK_PB7 1 &pcfg_pull_up>;
};
spi3_tx: spi3-tx {
rockchip,pins =
<1 RK_PC0 1 &pcfg_pull_up>;
};
};
spi4 {
spi4_clk: spi4-clk {
rockchip,pins =
<3 RK_PA2 2 &pcfg_pull_up>;
};
spi4_cs0: spi4-cs0 {
rockchip,pins =
<3 RK_PA3 2 &pcfg_pull_up>;
};
spi4_rx: spi4-rx {
rockchip,pins =
<3 RK_PA0 2 &pcfg_pull_up>;
};
spi4_tx: spi4-tx {
rockchip,pins =
<3 RK_PA1 2 &pcfg_pull_up>;
};
};
spi5 {
spi5_clk: spi5-clk {
rockchip,pins =
<2 RK_PC6 2 &pcfg_pull_up>;
};
spi5_cs0: spi5-cs0 {
rockchip,pins =
<2 RK_PC7 2 &pcfg_pull_up>;
};
spi5_rx: spi5-rx {
rockchip,pins =
<2 RK_PC4 2 &pcfg_pull_up>;
};
spi5_tx: spi5-tx {
rockchip,pins =
<2 RK_PC5 2 &pcfg_pull_up>;
testclk {
test_clkout0: test-clkout0 {
rockchip,pins =
<0 RK_PA0 1 &pcfg_pull_none>;
};
test_clkout1: test-clkout1 {
rockchip,pins =
<2 RK_PD1 2 &pcfg_pull_none>;
};
test_clkout2: test-clkout2 {
rockchip,pins =
<0 RK_PB0 3 &pcfg_pull_none>;
Johan Jonker
committed
otp_pin: otp-pin {
rockchip,pins = <1 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
};
otp_out: otp-out {
rockchip,pins = <1 RK_PA6 1 &pcfg_pull_none>;
uart0 {
uart0_xfer: uart0-xfer {
rockchip,pins =
<2 RK_PC0 1 &pcfg_pull_up>,
<2 RK_PC1 1 &pcfg_pull_none>;
};
uart0_cts: uart0-cts {
rockchip,pins =
<2 RK_PC2 1 &pcfg_pull_none>;
};
uart0_rts: uart0-rts {
rockchip,pins =
<2 RK_PC3 1 &pcfg_pull_none>;
};
};
uart1 {
uart1_xfer: uart1-xfer {
rockchip,pins =
<3 RK_PB4 2 &pcfg_pull_up>,
<3 RK_PB5 2 &pcfg_pull_none>;
};
};
uart2a {
uart2a_xfer: uart2a-xfer {
rockchip,pins =
<4 RK_PB0 2 &pcfg_pull_up>,
<4 RK_PB1 2 &pcfg_pull_none>;
};
};
uart2b {
uart2b_xfer: uart2b-xfer {
rockchip,pins =
<4 RK_PC0 2 &pcfg_pull_up>,
<4 RK_PC1 2 &pcfg_pull_none>;
};
};
uart2c {
uart2c_xfer: uart2c-xfer {
rockchip,pins =
<4 RK_PC3 1 &pcfg_pull_up>,
<4 RK_PC4 1 &pcfg_pull_none>;
};
};
uart3 {
uart3_xfer: uart3-xfer {
rockchip,pins =
<3 RK_PB6 2 &pcfg_pull_up>,
<3 RK_PB7 2 &pcfg_pull_none>;
};
uart3_cts: uart3-cts {
rockchip,pins =
<3 RK_PC0 2 &pcfg_pull_none>;
};
uart3_rts: uart3-rts {
rockchip,pins =
<3 RK_PC1 2 &pcfg_pull_none>;
};
};
uart4 {
uart4_xfer: uart4-xfer {
rockchip,pins =
<1 RK_PA7 1 &pcfg_pull_up>,
<1 RK_PB0 1 &pcfg_pull_none>;
};
};
uarthdcp {
uarthdcp_xfer: uarthdcp-xfer {
rockchip,pins =
<4 RK_PC5 2 &pcfg_pull_up>,
<4 RK_PC6 2 &pcfg_pull_none>;
};
};
pwm0 {
pwm0_pin: pwm0-pin {
rockchip,pins =
<4 RK_PC2 1 &pcfg_pull_none>;
};
pwm0_pin_pull_down: pwm0-pin-pull-down {
rockchip,pins =
<4 RK_PC2 1 &pcfg_pull_down>;
};
vop0_pwm_pin: vop0-pwm-pin {
rockchip,pins =
<4 RK_PC2 2 &pcfg_pull_none>;
};
vop1_pwm_pin: vop1-pwm-pin {
rockchip,pins =
<4 RK_PC2 3 &pcfg_pull_none>;
};
};
pwm1 {
pwm1_pin: pwm1-pin {
rockchip,pins =
<4 RK_PC6 1 &pcfg_pull_none>;
pwm1_pin_pull_down: pwm1-pin-pull-down {
<4 RK_PC6 1 &pcfg_pull_down>;
};
};
pwm2 {
pwm2_pin: pwm2-pin {
rockchip,pins =
<1 RK_PC3 1 &pcfg_pull_none>;
};
pwm2_pin_pull_down: pwm2-pin-pull-down {
rockchip,pins =
<1 RK_PC3 1 &pcfg_pull_down>;
};
};
pwm3a {
pwm3a_pin: pwm3a-pin {
rockchip,pins =
<0 RK_PA6 1 &pcfg_pull_none>;
};
};
pwm3b {
pwm3b_pin: pwm3b-pin {
rockchip,pins =
<1 RK_PB6 1 &pcfg_pull_none>;
hdmi {
hdmi_i2c_xfer: hdmi-i2c-xfer {
rockchip,pins =
<4 RK_PC1 3 &pcfg_pull_none>,
<4 RK_PC0 3 &pcfg_pull_none>;
};
hdmi_cec: hdmi-cec {
rockchip,pins =
<4 RK_PC7 1 &pcfg_pull_none>;
};
};
pcie_clkreqn_cpm: pci-clkreqn-cpm {
rockchip,pins =
<2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
};
pcie_clkreqnb_cpm: pci-clkreqnb-cpm {
rockchip,pins =
<4 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>;
};