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  1. May 27, 2010
    • Krzysztof Halasa's avatar
      drm/i915: Add support for interlaced display. · 734b4157
      Krzysztof Halasa authored 
      

This doesn't change the clock limits (minimums), i.e. it won't make it
output 720x576 PAL nor 720x480 NTSC, but it will work with modes like
1080i etc. (including GLX and textured Xvideo, not sure about the
overlay).

Tested on i915 + analog VGA, it would be worth checking if newer chips
(and which ones) still support interlaced mode.

Signed-off-by: default avatarKrzysztof Halasa <khc@pm.waw.pl>
Signed-off-by: default avatarEric Anholt <eric@anholt.net>
      734b4157
    • Daniel J Blueman's avatar
      i915: fix lock imbalance on error path... · f953c935
      Daniel J Blueman authored 
      

While investigating Intel i5 Arrandale GPU lockups with -rc4, I
noticed a lock imbalance.

Signed-off-by: default avatarDaniel J Blueman <daniel.blueman@gmail.com>
Signed-off-by: default avatarEric Anholt <eric@anholt.net>
      f953c935
    • Li Zefan's avatar
      drm/i915: Convert more trace events to DEFINE_EVENT · f41275e8
      Li Zefan authored 
      

Convert i915_gem_object_clflush to DEFINE_EVENT, and save ~0.5K:

   text    data     bss     dec     hex filename
  13204    2732      12   15948    3e4c i915_trace_points.o.orig
  12668    2732      12   15412    3c34 i915_trace_points.o

No change in functionality.

Signed-off-by: default avatarLi Zefan <lizf@cn.fujitsu.com>
Acked-by: default avatarSteven Rostedt <rostedt@goodmis.org>
Signed-off-by: default avatarEric Anholt <eric@anholt.net>
      f41275e8
    • Jesse Barnes's avatar
      drm/i915: add timeout to FBC disable waits · 9517a92f
      Jesse Barnes authored 
      FBC disable on 965 can take long enough to trigger latency checks in the
kernel so be sure to timeout after a reasonable period.

Fixes https://bugzilla.kernel.org/show_bug.cgi?id=15015

.

Tested-by: default avatarJames Ettle <theholyettlz@googlemail.com>
Signed-off-by: default avatarJesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: default avatarEric Anholt <eric@anholt.net>
      9517a92f
    • Zou Nan hai's avatar
      drm/i915: implement BSD ring buffer V2 · d1b851fc
      Zou Nan hai authored 
      

The BSD (bit stream decoder) ring is used for accessing the BSD engine
which decodes video bitstream for H.264 and VC1 on G45+.  It is
asynchronous with the render ring and has access to separate parts of
the GPU from it, though the render cache is coherent between the two.

Signed-off-by: default avatarZou Nan hai <nanhai.zou@intel.com>
Signed-off-by: default avatarXiang Hai hao <haihao.xiang@intel.com>
Signed-off-by: default avatarEric Anholt <eric@anholt.net>
      d1b851fc
    • Zou Nan hai's avatar
      drm/i915: convert some gem structures to per-ring V2 · 852835f3
      Zou Nan hai authored 
      

The active list and request list move into the ringbuffer structure,
so each can track its active objects in the order they are in that
ring.  The flushing list does not, as it doesn't matter which ring
caused data to end up in the render cache.  Objects gain a pointer to
the ring they are active on (if any).

Signed-off-by: default avatarZou Nan hai <nanhai.zou@intel.com>
Signed-off-by: default avatarXiang Hai hao <haihao.xiang@intel.com>
Signed-off-by: default avatarEric Anholt <eric@anholt.net>
      852835f3
    • Zou Nan hai's avatar
      drm/i915: introduce intel_ring_buffer structure (V2) · 8187a2b7
      Zou Nan hai authored 
      

Introduces a more complete intel_ring_buffer structure with callbacks
for setup and management of a particular ringbuffer, and converts the
render ring buffer consumers to use it.

Signed-off-by: default avatarZou Nan hai <nanhai.zou@intel.com>
Signed-off-by: default avatarXiang Hai hao <haihao.xiang@intel.com>
[anholt: Fixed up whitespace fail and rebased against prep patches]
Signed-off-by: default avatarEric Anholt <eric@anholt.net>
      8187a2b7
    • Eric Anholt's avatar
      drm/i915: Rename dev_priv->ring to dev_priv->render_ring. · d3301d86
      Eric Anholt authored 
      With the advent of the BSD ring, be clear about which ring this is.
The docs are pretty consistent with calling this the Render engine at
this point.
      d3301d86
    • Eric Anholt's avatar
      drm/i915: Move ringbuffer-related code to intel_ringbuffer.c. · 62fdfeaf
      Eric Anholt authored 
      This is preparation for supporting multiple ringbuffers on Ironlake.
The non-copy-and-paste changes are:
- de-staticing functions
- I915_GEM_GPU_DOMAINS moving to i915_drv.h to be used by both files.
- i915_gem_add_request had only half its implementation
  copy-and-pasted out of the middle of it.
      62fdfeaf
    • Chris Wilson's avatar
      drm/i915: Fail to load driver if KMS request without GEM · 79a78dd6
      Chris Wilson authored 
      The i915's implementation of KMS requires GEM in order to manage the
memory and execution domains of the framebuffer and associated
resources. By the point at which we detect broken a BIOS and need to
disable GEM, we have already registered ourselves as a KMS driver with
several subsystems. Rather than introducing a fragile unwind and attempt
to continue with UMS, spit out an error and unload the driver.

References:

  [Bug 15754] IP: [<ffffffffa0207589>] drm_mm_search_free+0x49/0x90 [drm]
              BUG: unable to handle kernel NULL pointer dereference at (null)
  https://bugzilla.kernel.org/show_bug.cgi?id=15754



[drm:i915_driver_load] *ERROR* Detected broken video BIOS with
262140/262144kB of video memory stolen.
[drm:i915_driver_load] *ERROR* Disabling GEM. (try reducing stolen
memory or updating the BIOS to fix).
i915 0000:00:02.0: irq 30 for MSI/MSI-X
[drm] set up 255M of stolen space
BUG: unable to handle kernel NULL pointer dereference at (null)
IP: [<ffffffffa0207589>] drm_mm_search_free+0x49/0x90 [drm]
PGD 69719067 PUD 69dda067 PMD 0
Oops: 0000 [#1] PREEMPT SMP
last sysfs file: /sys/module/snd_seq_oss/initstate
CPU 1
Pid: 867, comm: modprobe Not tainted 2.6.33-ARCH #1 G43Twins-FullHD/To
Be Filled By O.E.M.
RIP: 0010:[<ffffffffa0207589>]  [<ffffffffa0207589>] drm_mm_search_free+0x49/0x90 [drm]
RSP: 0018:ffff8800699f3af8  EFLAGS: 00010246
RAX: 0000000000000000 RBX: ffffffffffffffff RCX: 0000000000000000
RDX: 0000000000001000 RSI: 0000000000001000 RDI: ffff8800693d0f78
RBP: ffff8800699f3b18 R08: 0000000000001000 R09: 0000000000000000
R10: 2222222222222222 R11: 0000000000000000 R12: ffff880068de70c0
R13: 0000000000001000 R14: 0000000000000000 R15: ffff8800689cb000
FS:  00007fa93f4e5700(0000) GS:ffff880001880000(0000)
knlGS:0000000000000000
CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
CR2: 0000000000000000 CR3: 00000000695a0000 CR4: 00000000000406e0
DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000
DR3: 0000000000000000 DR6: 00000000ffff0ff0 DR7: 0000000000000400
Process modprobe (pid: 867, threadinfo ffff8800699f2000, task ffff8800694f4740)
Stack:
 ffff880068de73c0 ffff880068de70c0 ffff8800689cb000 0000000000001000
<0> ffff8800699f3b68 ffffffffa0299f63 ffff8800693d0f78 0000120068de70c0
<0> ffff8800689cb000 ffff880068de73c0 ffff880068de70c0 ffff8800689cb000
Call Trace:
 [<ffffffffa0299f63>] i915_gem_object_bind_to_gtt+0x83/0x360 [i915]
 [<ffffffffa029a2e5>] i915_gem_object_pin+0xa5/0xb0 [i915]
 [<ffffffffa029a3c5>] i915_gem_init_ringbuffer+0xd5/0x510 [i915]
 [<ffffffffa028dbee>] i915_driver_load+0x4ce/0xd00 [i915]
 [<ffffffffa0205d37>] ? drm_sysfs_device_add+0x87/0xb0 [drm]
 [<ffffffffa0203363>] ? drm_get_minor+0x1d3/0x330 [drm]
 [<ffffffffa02037e6>] drm_get_dev+0x326/0x580 [drm]
 [<ffffffffa02bc0a5>] i915_pci_probe+0x10/0xd0 [i915]
 [<ffffffff811e98a2>] local_pci_probe+0x12/0x20
 [<ffffffff811ea8e0>] pci_device_probe+0x80/0xb0
 [<ffffffff8127b12a>] ? driver_sysfs_add+0x5a/0x90
 [<ffffffff8127b273>] driver_probe_device+0x93/0x1a0
 [<ffffffff8127b413>] __driver_attach+0x93/0xa0
 [<ffffffff8127b380>] ? __driver_attach+0x0/0xa0
 [<ffffffff8127a8f8>] bus_for_each_dev+0x68/0x90
 [<ffffffff8127b0c9>] driver_attach+0x19/0x20
 [<ffffffff8127a0ad>] bus_add_driver+0xcd/0x2d0
 [<ffffffff8127b718>] driver_register+0x78/0x140
 [<ffffffff811eab91>] __pci_register_driver+0x51/0xd0
 [<ffffffffa02d6000>] ? i915_init+0x0/0x52 [i915]
 [<ffffffffa01fdc31>] drm_init+0x111/0x120 [drm]
 [<ffffffff810eb0cd>] ? register_shrinker+0x4d/0x60
 [<ffffffffa02d6000>] ? i915_init+0x0/0x52 [i915]
 [<ffffffffa02d6050>] i915_init+0x50/0x52 [i915]
 [<ffffffff81002047>] do_one_initcall+0x37/0x1a0
 [<ffffffff8108ed17>] sys_init_module+0xd7/0x250
 [<ffffffff81009fc2>] system_call_fastpath+0x16/0x1b
Code: eb 29 49 8b 41 28 31 d2 49 f7 f5 85 d2 74 39 44 89 c0 29 d0 48 89 c2 48 01 f2 49 39 d2 73 29 0f 1f 00 49 89 da 4c 89 d3 4d 89 d9 <4d> 8b 19 49 39 f9 41 0f 18 0b 74 2b 4d 8b 51 30 4d 89 cc 49 39
RIP  [<ffffffffa0207589>] drm_mm_search_free+0x49/0x90 [drm]
 RSP <ffff8800699f3af8>
CR2: 0000000000000000

Signed-off-by: default avatarChris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: default avatarEric Anholt <eric@anholt.net>
      79a78dd6
  3. May 26, 2010