Commits · 604880107010a1e5794552d184cd5471ea31b973 · 方亚芬 / linux

Apr 25, 2013

crypto: blowfish - add AVX2/x86_64 implementation of blowfish cipher · 60488010

Jussi Kivilinna authored Apr 13, 2013



Patch adds AVX2/x86-64 implementation of Blowfish cipher, requiring 32 parallel
blocks for input (256 bytes). Table look-ups are performed using vpgatherdd
instruction directly from vector registers and thus should be faster than
earlier implementations.

Signed-off-by: Jussi Kivilinna <jussi.kivilinna@iki.fi>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

60488010

crypto: tcrypt - add async cipher speed tests for blowfish · ad8b7c3e

Jussi Kivilinna authored Apr 13, 2013



Signed-off-by: Jussi Kivilinna <jussi.kivilinna@iki.fi>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

ad8b7c3e

crypto: testmgr - extend camellia test-vectors for camellia-aesni/avx2 · 23a836e8
Jussi Kivilinna authored Apr 13, 2013
```
Signed-off-by: Jussi Kivilinna <jussi.kivilinna@iki.fi>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
```
23a836e8

crypto: aesni_intel - fix Kconfig problem with CRYPTO_GLUE_HELPER_X86 · 7643a11a

Jussi Kivilinna authored Apr 10, 2013



The Kconfig setting for glue helper module is CRYPTO_GLUE_HELPER_X86, but
recent change for aesni_intel used CRYPTO_GLUE_HELPER instead. Patch corrects
this issue.

Cc: kbuild-all@01.org
Reported-by: kbuild test robot <fengguang.wu@intel.com>
Signed-off-by: Jussi Kivilinna <jussi.kivilinna@iki.fi>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

7643a11a

crypto: aesni_intel - add more optimized XTS mode for x86-64 · c456a9cd

Jussi Kivilinna authored Apr 08, 2013



Add more optimized XTS code for aesni_intel in 64-bit mode, for smaller stack
usage and boost for speed.

tcrypt results, with Intel i5-2450M:
256-bit key
        enc     dec
16B     0.98x   0.99x
64B     0.64x   0.63x
256B    1.29x   1.32x
1024B   1.54x   1.58x
8192B   1.57x   1.60x

512-bit key
        enc     dec
16B     0.98x   0.99x
64B     0.60x   0.59x
256B    1.24x   1.25x
1024B   1.39x   1.42x
8192B   1.38x   1.42x

I chose not to optimize smaller than block size of 256 bytes, since XTS is
practically always used with data blocks of size 512 bytes. This is why
performance is reduced in tcrypt for 64 byte long blocks.

Cc: Huang Ying <ying.huang@intel.com>
Signed-off-by: Jussi Kivilinna <jussi.kivilinna@iki.fi>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

c456a9cd

crypto: x86/camellia-aesni-avx - add more optimized XTS code · b5c5b072

Jussi Kivilinna authored Apr 08, 2013



Add more optimized XTS code for camellia-aesni-avx, for smaller stack usage
and small boost for speed.

tcrypt results, with Intel i5-2450M:
        enc     dec
16B     1.10x   1.01x
64B     0.82x   0.77x
256B    1.14x   1.10x
1024B   1.17x   1.16x
8192B   1.10x   1.11x

Since XTS is practically always used with data blocks of size 512 bytes or
more, I chose to not make use of camellia-2way for block sized smaller than
256 bytes. This causes slower result in tcrypt for 64 bytes.

Signed-off-by: Jussi Kivilinna <jussi.kivilinna@iki.fi>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

b5c5b072

crypto: cast6-avx: use new optimized XTS code · 70177286

Jussi Kivilinna authored Apr 08, 2013



Change cast6-avx to use the new XTS code, for smaller stack usage and small
boost to performance.

tcrypt results, with Intel i5-2450M:
        enc     dec
16B     1.01x   1.01x
64B     1.01x   1.00x
256B    1.09x   1.02x
1024B   1.08x   1.06x
8192B   1.08x   1.07x

Signed-off-by: Jussi Kivilinna <jussi.kivilinna@iki.fi>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

70177286

crypto: x86/twofish-avx - use optimized XTS code · 18be4527

Jussi Kivilinna authored Apr 08, 2013



Change twofish-avx to use the new XTS code, for smaller stack usage and small
boost to performance.

tcrypt results, with Intel i5-2450M:
        enc     dec
16B     1.03x   1.02x
64B     0.91x   0.91x
256B    1.10x   1.09x
1024B   1.12x   1.11x
8192B   1.12x   1.11x

Since XTS is practically always used with data blocks of size 512 bytes or
more, I chose to not make use of twofish-3way for block sized smaller than
128 bytes. This causes slower result in tcrypt for 64 bytes.

Signed-off-by: Jussi Kivilinna <jussi.kivilinna@iki.fi>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

18be4527

crypto: x86 - add more optimized XTS-mode for serpent-avx · a05248ed

Jussi Kivilinna authored Apr 08, 2013



This patch adds AVX optimized XTS-mode helper functions/macros and converts
serpent-avx to use the new facilities. Benefits are slightly improved speed
and reduced stack usage as use of temporary IV-array is avoided.

tcrypt results, with Intel i5-2450M:
        enc     dec
16B     1.00x   1.00x
64B     1.00x   1.00x
256B    1.04x   1.06x
1024B   1.09x   1.09x
8192B   1.10x   1.09x

Signed-off-by: Jussi Kivilinna <jussi.kivilinna@iki.fi>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

a05248ed

xfrm: add rfc4494 AES-CMAC-96 support · d2049d85

Jussi Kivilinna authored Apr 08, 2013



Now that CryptoAPI has support for CMAC, we can add support for AES-CMAC-96
(rfc4494).

Cc: Tom St Denis <tstdenis@elliptictech.com>
Signed-off-by: Jussi Kivilinna <jussi.kivilinna@iki.fi>
Acked-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

d2049d85

crypto: add CMAC support to CryptoAPI · 93b5e86a

Jussi Kivilinna authored Apr 08, 2013

Patch adds support for NIST recommended block cipher mode CMAC to CryptoAPI.

This work is based on Tom St Denis' earlier patch,
 http://marc.info/?l=linux-crypto-vger&m=135877306305466&w=2



Cc: Tom St Denis <tstdenis@elliptictech.com>
Signed-off-by: Jussi Kivilinna <jussi.kivilinna@iki.fi>
Acked-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

93b5e86a

crypto: testmgr - add empty test vectors for null ciphers · e448370d

Jussi Kivilinna authored Apr 07, 2013



Without these, kernel log shows:
[    5.984881] alg: No test for cipher_null (cipher_null-generic)
[    5.985096] alg: No test for ecb(cipher_null) (ecb-cipher_null)
[    5.985170] alg: No test for compress_null (compress_null-generic)
[    5.985297] alg: No test for digest_null (digest_null-generic)

Signed-off-by: Jussi Kivilinna <jussi.kivilinna@iki.fi>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

e448370d

crypto: testmgr - add AES GMAC test vectors · e9b7441a

Jussi Kivilinna authored Apr 07, 2013



Signed-off-by: Jussi Kivilinna <jussi.kivilinna@iki.fi>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

e9b7441a

crypto: gcm - fix rfc4543 to handle async crypto correctly · d733ac90

Jussi Kivilinna authored Apr 07, 2013



If the gcm cipher used by rfc4543 does not complete request immediately,
the authentication tag is not copied to destination buffer. Patch adds
correct async logic for this case.

Signed-off-by: Jussi Kivilinna <jussi.kivilinna@iki.fi>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

d733ac90

crypto: gcm - make GMAC work when dst and src are different · 9489667d

Jussi Kivilinna authored Apr 07, 2013



The GMAC code assumes that dst==src, which causes problems when trying to add
rfc4543(gcm(aes)) test vectors.

So fix this code to work when source and destination buffer are different.

Signed-off-by: Jussi Kivilinna <jussi.kivilinna@iki.fi>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

9489667d

hwrng: timeriomem - added devicetree hooks · b149a30d

Alexander Clouter authored Mar 31, 2013



This patch allows timeriomem_rng to be used via devicetree.

Signed-off-by: Alexander Clouter <alex@digriz.org.uk>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

b149a30d

hwrng: timeriomem - update to support more than one device · 1907da78

Alexander Clouter authored Mar 31, 2013



timeriomem_rng only supports a single device instance.  This patch
enables multiple timeriomem_rng devices to coexist as well as adds
some additional error checking.

Signed-off-by: Alexander Clouter <alex@digriz.org.uk>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

1907da78

crypto: crc32-pclmul - Use gas macro for pclmulqdq · 57ae1b05

Sandy Wu authored Mar 28, 2013



Occurs when CONFIG_CRYPTO_CRC32C_INTEL=y and CONFIG_CRYPTO_CRC32C_INTEL=y.
Older versions of bintuils do not support the pclmulqdq instruction. The
PCLMULQDQ gas macro is used instead.

Signed-off-by: Sandy Wu <sandyw@twitter.com>
Cc: stable@vger.kernel.org # 3.8+
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

57ae1b05

hwrng: bcm2835 - Add Broadcom BCM2835 RNG driver · 8c4196a2

Lubomir Rintel authored Mar 28, 2013



This adds a driver for random number generator present on Broadcom BCM2835 SoC,
used in Raspberry Pi and Roku 2 devices.

Signed-off-by: Dom Cobley <popcornmix@gmail.com>
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
Tested-by: Stephen Warren <swarren@wwwdotorg.org>
Cc: Herbert Xu <herbert@gondor.apana.org.au>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Matt Mackall <mpm@selenic.com>
Cc: linux-rpi-kernel@lists.infradead.org
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

8c4196a2

crypto: caam - static constify error data · 96aef9a8

Kim Phillips authored Mar 26, 2013



checkstack reports report_deco_status(), report_ccb_status() as
particularly excessive stack users.  Move their lookup tables
off the stack and put them in .rodata.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

96aef9a8

crypto: caam - change key gen functions to return signed int · 66b3e887

Kim Phillips authored Mar 26, 2013

commit 2af8f4a2

 "crypto: caam - coccicheck fixes" added error
return values yet neglected to change the type from unsigned.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

66b3e887

crypto: sha512 - Create module providing optimized SHA512 routines using... · 87de4579

Tim Chen authored Mar 26, 2013

crypto: sha512 - Create module providing optimized SHA512 routines using SSSE3, AVX or AVX2 instructions.

We added glue code and config options to create crypto
module that uses SSE/AVX/AVX2 optimized SHA512 x86_64 assembly routines.

Signed-off-by: Tim Chen <tim.c.chen@linux.intel.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

87de4579

crypto: sha512 - Optimized SHA512 x86_64 assembly routine using AVX2 RORX instruction. · 5663535b

Tim Chen authored Mar 26, 2013



Provides SHA512 x86_64 assembly routine optimized with SSE, AVX and
AVX2's RORX instructions.  Speedup of 70% or more has been
measured over the generic implementation.

Signed-off-by: Tim Chen <tim.c.chen@linux.intel.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

5663535b

crypto: sha512 - Optimized SHA512 x86_64 assembly routine using AVX instructions. · e01d69cb

Tim Chen authored Mar 26, 2013

Provides SHA512 x86_64 assembly routine optimized with SSE and AVX instructions.
Speedup of 60% or more has been measured over the generic implementation.

Signed-off-by: Tim Chen <tim.c.chen@linux.intel.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

e01d69cb

crypto: sha512 - Optimized SHA512 x86_64 assembly routine using Supplemental SSE3 instructions. · bf215cee

Tim Chen authored Mar 26, 2013

Provides SHA512 x86_64 assembly routine optimized with SSSE3 instructions.
Speedup of 40% or more has been measured over the generic implementation.

Signed-off-by: Tim Chen <tim.c.chen@linux.intel.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

bf215cee

crypto: sha512 - Expose generic sha512 routine to be callable from other modules · bf70fa9d

Tim Chen authored Mar 26, 2013



Other SHA512 routines may need to use the generic routine when
FPU is not available.

Signed-off-by: Tim Chen <tim.c.chen@linux.intel.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

bf70fa9d

crypto: sha256 - Create module providing optimized SHA256 routines using... · 8275d1aa

Tim Chen authored Mar 26, 2013

crypto: sha256 - Create module providing optimized SHA256 routines using SSSE3, AVX or AVX2 instructions.

We added glue code and config options to create crypto
module that uses SSE/AVX/AVX2 optimized SHA256 x86_64 assembly routines.

Signed-off-by: Tim Chen <tim.c.chen@linux.intel.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

8275d1aa

Apr 03, 2013

crypto: sha256 - Optimized sha256 x86_64 routine using AVX2's RORX instructions · d34a4600

Tim Chen authored Mar 26, 2013



Provides SHA256 x86_64 assembly routine optimized with SSE, AVX and
AVX2's RORX instructions.  Speedup of 70% or more has been
measured over the generic implementation.

Signed-off-by: Tim Chen <tim.c.chen@linux.intel.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

d34a4600

crypto: sha256 - Optimized sha256 x86_64 assembly routine with AVX instructions. · ec2b4c85

Tim Chen authored Mar 26, 2013

Provides SHA256 x86_64 assembly routine optimized with SSE and AVX instructions.
Speedup of 60% or more has been measured over the generic implementation.

Signed-off-by: Tim Chen <tim.c.chen@linux.intel.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

ec2b4c85

crypto: sha256 - Optimized sha256 x86_64 assembly routine using Supplemental SSE3 instructions. · 46d208a2

Tim Chen authored Mar 26, 2013

Provides SHA256 x86_64 assembly routine optimized with SSSE3 instructions.
Speedup of 40% or more has been measured over the generic implementation.

Signed-off-by: Tim Chen <tim.c.chen@linux.intel.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

46d208a2

crypto: sha256 - Expose SHA256 generic routine to be callable externally. · 35d2c9d0

Tim Chen authored Mar 26, 2013



Other SHA256 routine may need to use the generic routine when
FPU is not available.

Signed-off-by: Tim Chen <tim.c.chen@linux.intel.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

35d2c9d0

crypto: x86 - build AVX block cipher implementations only if assembler supports AVX instructions · 873b9caf

Jussi Kivilinna authored Mar 24, 2013



These modules require AVX support in assembler, so add new check to Makefile
for this.

Other option would be to use CONFIG_AS_AVX inside source files, but that would
result dummy/empty/no-fuctionality modules being created.

Signed-off-by: Jussi Kivilinna <jussi.kivilinna@iki.fi>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

873b9caf

crypto: x86/crc32-pclmul - assembly clean-ups: use ENTRY/ENDPROC · eca17269

Jussi Kivilinna authored Mar 24, 2013



Signed-off-by: Jussi Kivilinna <jussi.kivilinna@iki.fi>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

eca17269

crypto: ux500 - fix error return code in hash_dma_final() · eb167963

Wei Yongjun authored Mar 22, 2013



Fix to return a negative error code from the error handling
case instead of 0, as returned elsewhere in this function.

Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

eb167963

Mar 22, 2013

crypto: picoxcell - Use of_match_ptr() macro · 5cec26e9

Sachin Kamat authored Mar 14, 2013



This eliminates having an #ifdef returning NULL for the case
when OF is disabled.

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Acked-by: Jamie Iles <jamie@jamieiles.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

5cec26e9

hwrng: mxc-rnga - Use devm_ioremap_resource() · 264878e6

Fabio Estevam authored Mar 13, 2013



Using devm_ioremap_resource() can make the code cleaner and simpler.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

264878e6

crypto: caam - Fix missing init of '.type' in AEAD algos. · cb7d5662

Vakul Garg authored Mar 12, 2013



Following AEAD algo templates are updated for '.type' initialization.
	(a) authenc(hmac(sha224),cbc(aes))
	(b) authenc(hmac(sha384),cbc(aes))
	(c) authenc(hmac(sha224),cbc(des3_ede))
	(d) authenc(hmac(sha384),cbc(des3_ede))
	(e) authenc(hmac(sha224),cbc(des))
	(f) authenc(hmac(sha384),cbc(des))

Signed-off-by: Vakul Garg <vakul@freescale.com>
Reviewed-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

cb7d5662

crypto: caam - set RDB bit in security configuration register · 575c1bd5

Vakul Garg authored Mar 12, 2013

This change is required for post SEC-5.0 devices which have RNG4.
Setting RDB in security configuration register allows CAAM to use the
"Random Data Buffer" to be filled by a single request. The Random Data
Buffer is large enough for ten packets to get their IVs from a single
request. If the Random Data Buffer is not enabled, then each IV causes a
separate request, and RNG4 hardware cannot keep up resulting in lower
IPSEC throughput if random IVs are used.

Signed-off-by: Vakul Garg <vakul@freescale.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

575c1bd5

hwrng: exynos - add CONFIG_PM_SLEEP/CONFIG_PM_RUNTIME to suspend/resume · a80c5422

Jingoo Han authored Mar 12, 2013

This patch adds CONFIG_PM_SLEEP to suspend/resume functions to fix
the following build warning when CONFIG_PM_SLEEP is not selected.

drivers/char/hw_random/exynos-rng.c:147:12: warning: 'exynos_rng_runtime_suspend' defined but not used [-Wunused-function]
drivers/char/hw_random/exynos-rng.c:157:12: warning: 'exynos_rng_runtime_resume' defined but not used [-Wunused-function]

Add CONFIG_PM_RUNTIME to suspend/resume functions to fix the build
error. It is because UNIVERSAL_DEV_PM_OPS macro is related to both
CONFIG_PM_SLEEP and CONFIG_PM_RUNTIME.

drivers/char/hw_random/exynos-rng.c:167:8: error: 'exynos_rng_runtime_suspend' undeclared here (not in a function)
drivers/char/hw_random/exynos-rng.c:167:8: error: 'exynos_rng_runtime_resume' undeclared here (not in a function)

Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Reported-by: David Rientjes <rientjes@google.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

a80c5422

Mar 21, 2013

crypto: ux500 - replace kmalloc and then memcpy with kmemdup · 1643a35f

Mihnea Dobrescu-Balaur authored Mar 11, 2013



Signed-off-by: Mihnea Dobrescu-Balaur <mihneadb@gmail.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

1643a35f