- Sep 06, 2014
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Dylan Reid authored
The Acer Chromebook 13, codenamed Big, contains an NVIDIA tegra124 processor and is similar to the Venice2 reference platform. The keyboard, USB 2, audio, sdcard and emmc have been tested and work on the 1366x768 models. The Full HD models haven't been tested yet. WiFi does not yet work, it needs at least some PMIC changes to enable the 32k clock. The elan trackpad is not yet functional but hopefully will be soon as there are patches under review. There is also an issue on reboot because the TPM isn't reset. It will cause the stock firmware to enter recovery mode. This can be worked around by an EC-reset, press the refresh and power keys at the same time. Signed-off-by: Dylan Reid <dgreid@chromium.org> Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Dylan Reid authored
These labels will be used by other boards in addition to Venice2, move them to tegra124.dtsi so they are defined in a common place. Signed-off-by: Dylan Reid <dgreid@chromium.org> Signed-off-by: Stephen Warren <swarren@nvidia.com>
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- Sep 03, 2014
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Stephen Warren authored
Venice2 contains an Atmel MXT touchpad. Add an I2C node for it to DT. The Linux driver doesn't quite work on this platform yet, but adding the DT node causes no issues, and will allow the device to work once the driver is fixed. Signed-off-by: Stephen Warren <swarren@nvidia.com>
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- Aug 27, 2014
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Thierry Reding authored
These nodes are required so that the flow controller driver can obtain the I/O memory region from device tree rather than hard-coding it. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Stephen Warren authored
This pinmux tables currently omit any configuration for PCIe clk_req, wake, and rst pins, which in turn causes intermittent failures in U-Boot's PCIe support. Import an updated version of the pinmux tables which rectifies this. (While I'm still hoping to remove the pinmux tables from DTs for Tegra124+ devices, while they're still here, they may as well be complete and correct). Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Mikko Perttunen authored
This enables the integrated SATA controller on the Tegra124 system-on-chip on the Jetson TK1 board and adds regulators for the onboard Molex connector commonly used to power SATA devices. The regulators are marked always-on since they can be used for other purposes than powering SATA devices. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> [swarren, fixed node sort order] Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Mikko Perttunen authored
This adds the integrated AHCI-compliant Serial ATA controller present in Tegra124 systems-on-chip to the Tegra124 device tree. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> [swarren, fixed node sort order] Signed-off-by: Stephen Warren <swarren@nvidia.com>
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- Aug 25, 2014
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Geert Uytterhoeven authored
On r8a7791, i2c6 (aka iic3) doesn't need pinmux, but the koelsch dts refers to non-existent pinmux configuration data: pinmux core: sh-pfc does not support function i2c6 sh-pfc e6060000.pfc: invalid function i2c6 in map table Remove it to fix this. Fixes: commit 1d41f36a ("ARM: shmobile: koelsch dts: Add VDD MPU regulator for DVFS") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Signed-off-by: Olof Johansson <olof@lixom.net>
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Marcel Ziswiler authored
Working on Gigabit/PCIe support in U-Boot for Apalis T30 I realised that the current device tree source includes for our modules only happen to work due to referencing the on-carrier 5v0 supply from USB which is not at all available on-module. The modules actually contain TPS60150 charge pumps to generate the PMIC required 5 volts from the one and only 3.3 volt module supply. This patch fixes this. (Note: When back-porting this to v3.16 stable releases, simply drop the change to tegra30-apalis.dtsi; that file was added in v3.17) Cc: <stable@vger.kernel.org> #v3.16+ Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
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- Aug 23, 2014
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Heiko Stuebner authored
During the restructuring of the Rockchip Cortex-A9 dtsi files it seems like the pinctrl settings vanished at some point from the mmc0 support. This of course renders them unusable, so readd the necessary pinctrl properties. Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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- Aug 20, 2014
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Daniel Drake authored
Increase max i2c bus frequency beyond the default for faster data transfers. According to the manual, these faster speeds are only available when the board is wired up the right way. In this case, the vendor kernel has run at this speed for a long time. sda-delay is needed for talking to RTC on PMIC, otherwise the i2c controller never sees an ACK. Strangely the other PMIC i2c slave (the main one) works fine even without this delay. I Chose value 100 to match the vendor kernel. Signed-off-by: Daniel Drake <drake@endlessm.com> Reviewed-by: Tomasz Figa <t.figa@samsung.com> Tested-by: Tomeu Vizoso <tomeu.vizoso@collabora.com> Signed-off-by: Olof Johansson <olof@lixom.net>
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Daniel Drake authored
The ODROID kernel shows that the PMIC interrupt line is hooked up to pin GPX3-2. This is needed for the max77686-irq driver to create the PMIC IRQ domain, which is needed by max77686-rtc. Signed-off-by: Daniel Drake <drake@endlessm.com> Tested-by: Tomeu Vizoso <tomeu.vizoso@collabora.com> Signed-off-by: Olof Johansson <olof@lixom.net>
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- Aug 19, 2014
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Fugang Duan authored
The current pinfunc define all uart CTS_B IO port for DCE uart 'CTS_B' IP port. Since uart IP port 'CTS_B' is output, and it don't need to set 'SELECT_INPUT' bit. Signed-off-by: Fugang Duan <B38611@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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- Aug 18, 2014
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Lothar Waßmann authored
The VPU on i.MX53 has two distinct clocks for register access and internal function. Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de> Fixes: fbf970f6 ("ARM: dts: mx53qsb: Enable VPU support") Cc: <stable@vger.kernel.org> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Silvio Fricke authored
Signed-off-by: Silvio Fricke <silvio.fricke@gmail.com> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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Bill Pringlemeir authored
Previous version had an extra 'fsl' which made the pins not match any entry. The console message, vf610-pinctrl 40048000.iomuxc: no fsl,pins property in node \ /soc/aips-bus@40000000/iomuxc@40048000/vf610-twr/esdhc1grp is displayed without the fix. The prior version would generally work as u-boot sets the pins properly for sdhc. This change allows Linux sdhc use even if u-boot is built without sdhc support. Signed-off-by: Bill Pringlemeir <bpringlemeir@nbsps.com> Acked-by: Stefan Agner <stefan@agner.ch> Fixes: 0517fe6a ("ARM: dts: vf610-twr: Add support for sdhc1") Cc: <stable@vger.kernel.org> Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
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- Aug 09, 2014
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Stephen Rothwell authored
This was caused by commit 5a8da524 ("ARM: dts: exynos5420: add dsi node"), which conflicted with d51cad7d ("ARM: dts: remove display power domain for exynos5420"). The DTS addition should never have been merged through the DRM tree in the first place, and it lacked an ack from the platform maintainer (who would have known that the disp_pd reference got removed). Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Olof Johansson <olof@lixom.net>
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Doug Anderson authored
The EHCI and HSIC device tree nodes were added in the wrong place. Fix them. Signed-off-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Olof Johansson <olof@lixom.net>
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- Aug 03, 2014
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YoungJun Cho authored
This patch adds common part of dsi node. Signed-off-by: YoungJun Cho <yj44.cho@samsung.com> Acked-by: Inki Dae <inki.dae@samsung.com> Acked-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
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YoungJun Cho authored
This patch adds mipi-phy node for MIPI DSI device. Signed-off-by: YoungJun Cho <yj44.cho@samsung.com> Acked-by: Inki Dae <inki.dae@samsung.com> Acked-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
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YoungJun Cho authored
This patch adds sysreg property to fimd device node which is required to use I80 interface. Signed-off-by: YoungJun Cho <yj44.cho@samsung.com> Acked-by: Inki Dae <inki.dae@samsung.com> Acked-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
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YoungJun Cho authored
This patch adds sysreg property to fimd device node which is required to use I80 interface. Signed-off-by: YoungJun Cho <yj44.cho@samsung.com> Acked-by: Inki Dae <inki.dae@samsung.com> Acked-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
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- Aug 01, 2014
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Vince Bridgers authored
This patch adds socfpga Ethernet filter attributes for multicast and unicast filters per Synopsys Ethernet IP configuration chosen by Altera for the Cyclone 5 and Arria SOC FPGAs. Signed-off-by: Vince Bridgers <vbridgers2013@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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- Jul 31, 2014
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Haojian Zhuang authored
Use CPU_METHOD_OF_DECLARE() instead. And declare smp method in dts file. Changelog: v6: * Use hisilicon,hi3620-smp as enable-method property in Hi3620 dts. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> Acked-by: Wei Xu <xuwei5@hisilicon.com> Signed-off-by: Olof Johansson <olof@lixom.net>
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Haifeng Yan authored
Add dts file for Hisilicon x5hd2 development kit board. Signed-off-by: Haifeng Yan <yanhaifeng@gmail.com> Signed-off-by: Jiancheng Xue <jchxue@gmail.com> Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> Acked-by: Wei Xu <xuwei5@hisilicon.com> [olof: Rename dts/dtsi to include hisi prefix] Signed-off-by: Olof Johansson <olof@lixom.net>
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Doug Anderson authored
This is the top USB port on the evb (the one closest to the Ethernet connector). Signed-off-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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Kever Yang authored
rk3288 has two kind of usb controller; this adds the ehci variant for host0 and hsic. At the moment we don't add any phys for these controllers, but the default settings seem to work OK. There is a hardware problem in ohci controller which make it unavailable and host0 controller can only support high-speed devices. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Signed-off-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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Doug Anderson authored
There is no phy driver that works on the Rockchip board for either USB host port yet. For now just hardcode the vbus signal to be on all the time which makes both the dwc2 host and the EHCI port work. Signed-off-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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Marcel Ziswiler authored
Working on sound support I noticed the Apalis T30 Evaluation board device tree missing the more generic Apalis T30 compatible string. Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
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Thierry Reding authored
Indentation of the clock property used a hodgepodge of tabs and spaces. Make them more consistent (tabs for indentation followed by spaces for alignment). Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
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Linus Walleij authored
The GPIO pin connected to card detect was inverted twice: once by the argument to the GPIO line itself where it was magically marked as active low by the flag GPIO_ACTIVE_LOW (0x01) in the third cell, and also marked active low AGAIN by explicitly stating "cd-inverted" (a deprecated method). After commit 78f87df2 "mmc: mmci: Use the common mmc DT parser" this results in the line being inverted twice so it was effectively uninverted, while the old code would not have this effect, instead disregarding the flag on the GPIO line altogether, which is a bug. I admit the semantics may be unclear but inverting twice is as good a definition as any on how this should work. So fix up the buggy device tree. Use proper #includes so the DTS is clear and readable. Cc: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Olof Johansson <olof@lixom.net>
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- Jul 30, 2014
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Heiko Stuebner authored
This adds the Designware compatible watchdog found on RK3xxx Cortex-A9 SoCs. Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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Heiko Stuebner authored
We set default pinctrl settings for the uarts in rk3188.dtsi already, so remove forgotten duplicate. Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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Chanwoo Choi authored
This patch add missing pinctrl for uart0/1 for Exynos3250. The gpio pin ( uart0_data, uart0_fctl, uart1_data) is only used for UART IP. Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> Acked-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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Chanwoo Choi authored
This patch removes duplicat 'interrupt-parent' property for Exynos3250 because exynos3250.dtsi already defined 'interrupt-parent' property as following: In arch/arm/boot/dts/exynos3250.dtsi: compatible = "samsung,exynos3250"; interrupt-parent = <&gic>; Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> Acked-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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Chanwoo Choi authored
This patch add TMU (Thermal Management Unit) dt node to monitor the high temperature for Exynos3250. Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> Acked-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Eduardo Valentin <edubezval@gmail.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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Thomas Abraham authored
The IRQB interrupt pin of MAX77686 PMIC is connected to GPX3[2] pin of Exynos5250 on the Exynos5250 SMDK board. Specify this connection using interrupts property for the max77686 pmic node. Signed-off-by: Thomas Abraham <thomas.ab@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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Andreas Faerber authored
Move it from exynos5250-cros-common.dtsi to exynos5250-snow.dts. Spring does not need it, it uses an Atmel maXTouch instead. Signed-off-by: Andreas Faerber <afaerber@suse.de> Reviewed-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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Andreas Faerber authored
Move it from exynos5250-cros-common.dtsi to exynos5250-snow.dts. Spring does not need it, it uses an s5m8767 instead. Signed-off-by: Andreas Faerber <afaerber@suse.de> Reviewed-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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- Jul 29, 2014
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Tony Lindgren authored
Commit 9188883f (ARM: dts: Enable twl4030 off-idle configuration for selected omaps) allowed n900 to cut off core voltages during off-idle. This however caused a regression where twl regulator vaux1 was not getting enabled for the LCD panel as we are not requesting it for the panel. Turns out quite a few devices on n900 are using vaux1, and we need to either stop idling it, or add proper regulator_get calls for all users. But until we have a proper solution implemented and tested, let's just disable the twl off-idle configuration for now for n900. Reported-by: Aaro Koskinen <aaro.koskinen@iki.fi> Fixes: 9188883f (ARM: dts: Enable twl4030 off-idle configuration for selected omaps) Signed-off-by: Tony Lindgren <tony@atomide.com>
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