- Jun 28, 2016
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Linus Walleij authored
This is the first Dragonboard based on APQ8060 and PM8058. It was produced in 2011 in cooperation between Qualcomm and BSQUARE. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
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Linus Walleij authored
There is currently a fixed regulator in the .dtsi file for the MSM8660 chipset, used by the SURF board. We want to define real regulators for a board using this chipset, so push the fixed regulator down to the SURF board which is the only user. Reviewed-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
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Linus Walleij authored
The RTC was defined on 0x11d but on the MSM8660/APQ8060 it is actually on 0x1e8. We were saved by the fact that the driver does not use the reg parameter: instead it uses the compatible string to figure out where the RTC is. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
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Linus Walleij authored
The I2C block on the GSBI12 is used on the APQ8060 Dragonboard for sensors. Make it available in the chipset file. Take this opportunity to fix the IRQ flag "0" to "NONE" using the IRQ DT include. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
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Linus Walleij authored
This adds the L2CC IPC resource and RPM devices plus the nodes for the PM8901 and PM8058 regulators to the MSM8660 device tree. This was tested on the APQ8060 Dragonboard. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
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Linus Walleij authored
The SDCC5 SD/MMC controller is used for a second uSD slot on the APQ8060 Dragonboard. On most other systems it is just dark silicon so define it and leave it as "disabled" in the core SoC file. Reviewed-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
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Linus Walleij authored
This adds the 8660 PMIC GPIO and MPP blocks to the MSM8660 DTSI. Verified against the vendor tree to be in these locations with these interrupts, tested on the APQ8060 Dragonboard. Reviewed-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
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John Stultz authored
Since the pmic8xxx-pwrkey driver is already supported in the qcom-apq8064.dtsi, and the pmic8xxx-pwrkey supports logic to configure proper device shutdown when ps_hold goes low, it is better to use that driver then a generic gpio button. Thus this patch remove the gpio power key entry here, so we don't get double input events from having two drivers enabled. Cc: Rob Herring <robh+dt@kernel.org> Cc: Andy Gross <agross@codeaurora.org> Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: Stephen Boyd <stephen.boyd@linaro.org> Cc: linux-arm-msm@vger.kernel.org Cc: devicetree@vger.kernel.org Acked-by: Rob Herring <robh@kernel.org> Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: John Stultz <john.stultz@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
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Andy Gross authored
This patch updates the qcom,state-cells to qcom,smem-state-cells to match recent changes to the binding. Signed-off-by: Andy Gross <andy.gross@linaro.org>
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Andy Gross authored
This patch adds the qcom,controlled-remotely property for the blsp2_bam controller node. This board requires this, otherwise the board fails to boot due to access of protected registers during BAM initialization. Fixes: 62bc8179 dts: msm8974: Add blsp2_bam dma node Signed-off-by: Andy Gross <andy.gross@linaro.org> Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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Parth Pancholi authored
This board locks up if we stress test the eMMC, as the regulator s4 is unable to supply enough current for all the peripherials attached to it. As this supply is wired up to most of the peripherials including DDR, it resulted in such lockup. This patch fixes this issue by setting s4 regulator correctly with Auto power mode. Reported-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> [Srinivas Kandagatla: rewrote the change log] Tested-by: Girish Sharma <girish.sharma@einfochips.com> Signed-off-by: Parth Pancholi <parth.pancholi@einfochips.com> Signed-off-by: Andy Gross <andy.gross@linaro.org>
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Srinivas Kandagatla authored
This board has been renamed recently and announced at https://eragon.einfochips.com/products/sd-600eval.html So rename this board files so that it reflects actual product in market. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
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Srinivas Kandagatla authored
This patch move sdcc3 pinctrl nodes out of board file, so that other boards do not duplicate the same thing. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
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Srinivas Kandagatla authored
This patch moves out the sdcc1 pinctrl nodes out of board files to soc file, so that it will be duplicated in other board files. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
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- Jun 12, 2016
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Andy Gross authored
This patch adds the firmware node for the APQ8064 Signed-off-by: Andy Gross <andy.gross@linaro.org> Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
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Andy Gross authored
This patch adds the Qualcomm SCM firmware node. Signed-off-by: Andy Gross <andy.gross@linaro.org> Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
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Andy Gross authored
This patch adds the firmware node for the SCM Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org> Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
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Andy Gross authored
This patch adds the power key device tree node. Signed-off-by: Andy Gross <andy.gross@linaro.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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Andy Gross authored
The #size-cells for the pmics are 0, but we specify a size in the reg property so that MPP and GPIO modules can figure out how many pins there are. Now that we've done that by counting irqs, we can remove the size elements in the reg properties and be DT compliant. Signed-off-by: Andy Gross <andy.gross@linaro.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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Stephen Boyd authored
Enable the sdcard slot and wire up the regulators for the two storage controllers found on the apq8074 dragonboard. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
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Stephen Boyd authored
Add the appropriate min/max voltages for the regulators on the apq8074 dragonboard so that they can be used by clients properly. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Andy Gross <andy.gross@linaro.org>
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- Jun 11, 2016
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Andy Gross authored
This adds back the dma channels for the i2c1 node. This is safe now that the qcom,controlled-remotely changes are in place and will be used on the boards that require it. This reverts commit 10c0f0e9.
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Andy Gross authored
This puts back in place the blsp2_bam node. This can be safely added due to the addition of the special qcom,controlled-remotely flag that will be used on specific boards that require it. This reverts commit 338d5188.
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- May 11, 2016
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Boris Brezillon authored
The memory range assigned to the PMC (Power Management Controller) was not including the PMC_PCR register which are used to control peripheral clocks. This was working fine thanks to the page granularity of ioremap(), but started to fail when we switched to syscon/regmap, because regmap is making sure that all accesses are falling into the reserved range. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Reported-by: Richard Genoud <richard.genoud@gmail.com> Tested-by: Richard Genoud <richard.genoud@gmail.com> Fixes: 863a81c3 ("clk: at91: make use of syscon to share PMC registers in several drivers") Cc: <stable@vger.kernel.org> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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- May 10, 2016
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Marc Gonzalez authored
The device driver was added in v4.5 by commit dca536c4 ("watchdog: add support for Sigma Designs SMP86xx/SMP87xx") Signed-off-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Marc Gonzalez authored
This platform will use the new generic platdev driver. Signed-off-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Marc Gonzalez authored
Commit fefe0535 ("clk: tango4: improve clkgen driver") added support for USB and SDIO clocks. Signed-off-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Marc Gonzalez authored
Define the CPU temperature sensor, and critical trip point. Commit 799d71da471c ("add temperature sensor support for tango SoC") added the device driver. Acked-by: Eduardo Valentin <edubezval@gmail.com> Signed-off-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Wenyou Yang authored
An error in documentation of the NAND Flash Controller (NFC) led to choose another compatibility string for sama5d2 with an impact on the NAND flash ready/busy information. It was producing the error message: atmel_nand 80000000.nand: Time out to wait for interrupt: 0x08000000 and had an impact on performance. So, switch back to the classical "atmel,sama5d3-nfc" compatibility string for this SoC which gives the proper ready/busy bit information. The NAND flash driver will be updated to remove the support for this different implementation. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Acked-by: Romain Izard <romain.izard.pro@gmail.com> [nicolas.ferre@atmel.com: change commit message] Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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- May 09, 2016
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Joel Stanley authored
This adds a common device tree for all fifth generation Aspeed systems, and a board specific device tree for the ast2500 evaluation board. Signed-off-by: Joel Stanley <joel@jms.id.au>
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Joel Stanley authored
A common device tree for all forth gen/ast2400 systems and a board specific dts for the Palmetto OpenPower developemnt machine which was used for testing. Signed-off-by: Joel Stanley <joel@jms.id.au>
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Priit Laes authored
Enable pll3 and pll7 clocks that are needed by display clocks. Signed-off-by: Priit Laes <plaes@plaes.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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Olliver Schinagl authored
There are 3 kinds of OLinuXino Lime2 boards. One without any on board storage, one with NAND storage and one with eMMC storage. This patch adds the eMMC variant of boards. eMMC storage is different from a regular SD card in that it is soldered on the board and cannot be changed. Additionally, it shares pins with the NAND module and with the second SPI port. Signed-off-by: Olliver Schinagl <oliver@schinagl.nl> [Maxime: Removed the change log from the commit log] Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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- May 06, 2016
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Marek Szyprowski authored
MAX8997 PMIC requires interrupt and fails probing without it. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Fixes: d105f0b1 ("ARM: dts: Add basic dts file for Samsung Trats board") Cc: <stable@vger.kernel.org> [k.kozlowski: Write commit message, add CC-stable] Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
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Marek Szyprowski authored
The usage of slash character causes failure when creating regulator debugfs entry. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> [k.kozlowski: Write commit message] Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
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Javier Martinez Canillas authored
The MFC nodes with the memory regions reserved for memory allocations are missing in the Exynos5420 Peach Pit and Exynos5800 Peach Pi DTS. This causes the s5p-mfc driver probe to fail with the following error: [ 4.140647] s5p_mfc_alloc_memdevs:1072: Failed to declare coherent memory for MFC device [ 4.216163] s5p-mfc: probe of 11000000.codec failed with error -12 Add the missing nodes so the driver probes and the {en,de}coder video nodes are registered correctly: [ 4.096277] s5p-mfc 11000000.codec: decoder registered as /dev/video4 [ 4.102282] s5p-mfc 11000000.codec: encoder registered as /dev/video5 Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com> Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
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Mike Williams authored
Add node to support SAMA5D4 hardware random number generator. Signed-off-by: Mike Williams <mike@mikebwilliams.com> [nicolas.ferre@atmel.com: reduce the register map size] Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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Mike Williams authored
Add node to support SAMA5D3 hardware random number generator. Signed-off-by: Mike Williams <mike@mikebwilliams.com> [nicolas.ferre@atmel.com: reduce the register map size] Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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Mike Williams authored
Add node to support SAMA5D2 hardware random number generator. Signed-off-by: Mike Williams <mike@mikebwilliams.com> [nicolas.ferre@atmel.com: reduce the register map size] Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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Nicolas Ferre authored
No need to map 0x4000 bytes for the TRNG device: reduce it to 0x100. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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