Commit dc63fbe3 authored by Xiongfeng Wang's avatar Xiongfeng Wang Committed by Xiongfeng Wang
Browse files

PCI: Fail MSI-X mapping if MSI-X Table offset is out of range of BAR space

euler inclusion
category: bugfix
bugzilla: https://gitee.com/openeuler/kernel/issues/I8XWBL


CVE: NA

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This patch add check for the offset of MSI-X Table. If it is out of range
of the BAR space BIR selects, we just fail this MSI-X mapping.

Signed-off-by: default avatarXiongfeng Wang <xiongfeng.wang@linaro.org>
Reviewed-by: default avatarHanjun Guo <guohanjun@huawei.com>
Signed-off-by: default avatarJialin Zhang <zhangjialin11@huawei.com>
 Conflicts:
	drivers/pci/msi.c
Signed-off-by: default avatarXiongfeng Wang <xiongfeng.wang@linaro.org>
parent 070dcfd3
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