Unverified Commit 070dcfd3 authored by openeuler-ci-bot's avatar openeuler-ci-bot Committed by Gitee
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!4027 [OLK-6.6] Intel RDT non-contiguous CBM support

Merge Pull Request from: @xiaochenshen 
 
**About Intel RDT non-contiguous CBM support:**

GNR and SRF support L3/L2 non-contiguous way masks. Linux kernel changes is needed to support this.

Legacy RDT only support contiguous bits in L3/L2 CAT Cache Bit Mask (CBM) when allocating L3/L2 cache. For example, 0x111 is a valid bit mask but 0x101 is an invalid bit mask. This is limitation of legacy RDT hardware. It limits user's capability to allocate L3/L2 cache efficiently and cause poor performance.

With non-contiguous bits in L3/L2 CAT, we can allocate L3/L2 cache in various ways and utilize the cache efficiently and improve user application performance.

It fixes the issue:
https://gitee.com/openeuler/intel-kernel/issues/I8WO9B

**About the patches:**
There are 4 backported upstream patches:
aaa5fa35743ab9f0726568611a85e3e15349b9bf Documentation/x86: Document resctrl's new sparse_masks
4dba8f10b8fef9c5b0f9ed83dd1af91a1795ead1 x86/resctrl: Add sparse_masks file in info
0e3cd31f6e9074886dea5a999bfcc563d144e7de x86/resctrl: Enable non-contiguous CBMs in Intel CAT
39c6eed1f61594f737160e498d29673edbd9eefd x86/resctrl: Rename arch_has_sparse_bitmaps

**Passed tests:**
Intel RDT non-contiguous CBM CAT tests: passed. 
 
Link:https://gitee.com/openeuler/kernel/pulls/4027

 

Reviewed-by: default avatarJason Zeng <jason.zeng@intel.com>
Signed-off-by: default avatarZheng Zengkai <zhengzengkai@huawei.com>
parents 652b917c 54c9c9bb
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