Commit b9a40506 authored by Stephen Boyd's avatar Stephen Boyd
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Merge branches 'clk-imx', 'clk-microchip', 'clk-cleanup', 'clk-bindings',...

Merge branches 'clk-imx', 'clk-microchip', 'clk-cleanup', 'clk-bindings', 'clk-ti' and 'clk-kasprintf' into clk-next

 - Handle allocation failures from kasprintf() and friends

* clk-imx:
  clk: imx: clk-imx8mp: improve error handling in imx8mp_clocks_probe()
  clk: imx93: fix memory leak and missing unwind goto in imx93_clocks_probe
  clk: imx: clk-imx8mn: fix memory leak in imx8mn_clocks_probe
  dt-bindings: clock: imx8m: Add missing interrupt property
  clk: imx: clk-imxrt1050: fix memory leak in imxrt1050_clocks_probe
  clk: imx: composite-8m: Add imx8m_divider_determine_rate
  clk: imx: scu: use _safe list iterator to avoid a use after free
  clk: imx: drop imx_unregister_clocks
  clk: imx6ul: retain early UART clocks during kernel init
  clk: imx: imx6sx: Remove CLK_SET_RATE_PARENT from the LDB clocks

* clk-microchip:
  dt-bindings: clocks: at91sam9x5-sckc: convert to yaml
  dt-bindings: clocks: atmel,at91rm9200-pmc: convert to yaml
  clk: microchip: Use of_property_read_bool() for boolean properties
  clk: microchip: convert SOC_MICROCHIP_POLARFIRE to ARCH_MICROCHIP_POLARFIRE

* clk-cleanup:
  clk: fix typo in clk_hw_register_fixed_rate_parent_data() macro
  clk: Fix memory leak in devm_clk_notifier_register()
  clk: mvebu: Iterate over possible CPUs instead of DT CPU nodes
  clk: mvebu: Use of_get_cpu_hwid() to read CPU ID
  MAINTAINERS: Add Marvell mvebu clock drivers
  clk: mvebu: Use of_address_to_resource()
  clk: tegra: tegra124-emc: Fix potential memory leak
  clk: clocking-wizard: Fix Oops in clk_wzrd_register_divider()
  clk: bcm: rpi: Fix off by one in raspberrypi_discover_clocks()
  clk: sifive: Use devm_platform_ioremap_resource()

* clk-bindings:
  dt-bindings: clock: drop unneeded quotes and use absolute /schemas path
  dt-bindings: rcc: stm32: Sync with u-boot copy for STM32MP13 SoC

* clk-ti:
  clk: keystone: syscon-clk: Add support for audio refclk
  dt-bindings: clock: Add binding documentation for TI Audio REFCLK
  dt-bindings: clock: ehrpwm: Remove unneeded syscon compatible
  clk: keystone: syscon-clk: Allow the clock node to not be of type syscon

* clk-kasprintf:
  clk: clocking-wizard: check return value of devm_kasprintf()
  clk: ti: clkctrl: check return value of kasprintf()
  clk: keystone: sci-clk: check return value of kasprintf()
  clk: si5341: free unused memory on probe failure
  clk: si5341: check return value of {devm_}kasprintf()
  clk: si5341: return error if one synth clock registration fails
  clk: cdce925: check return value of kasprintf()
  clk: vc5: check memory returned by kasprintf()
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Device Tree Clock bindings for arch-at91

This binding uses the common clock binding[1].

[1] Documentation/devicetree/bindings/clock/clock-bindings.txt

Slow Clock controller:

Required properties:
- compatible : shall be one of the following:
	"atmel,at91sam9x5-sckc",
	"atmel,sama5d3-sckc",
	"atmel,sama5d4-sckc" or
	"microchip,sam9x60-sckc":
		at91 SCKC (Slow Clock Controller)
- #clock-cells : shall be 1 for "microchip,sam9x60-sckc" otherwise shall be 0.
- clocks : shall be the input parent clock phandle for the clock.

Optional properties:
- atmel,osc-bypass : boolean property. Set this when a clock signal is directly
  provided on XIN.

For example:
	sckc@fffffe50 {
		compatible = "atmel,at91sam9x5-sckc";
		reg = <0xfffffe50 0x4>;
		clocks = <&slow_xtal>;
		#clock-cells = <0>;
	};

Power Management Controller (PMC):

Required properties:
- compatible : shall be "atmel,<chip>-pmc", "syscon" or
	"microchip,sam9x60-pmc"
	<chip> can be: at91rm9200, at91sam9260, at91sam9261,
	at91sam9263, at91sam9g45, at91sam9n12, at91sam9rl, at91sam9g15,
	at91sam9g25, at91sam9g35, at91sam9x25, at91sam9x35, at91sam9x5,
	sama5d2, sama5d3 or sama5d4.
- #clock-cells : from common clock binding; shall be set to 2. The first entry
  is the type of the clock (core, system, peripheral or generated) and the
  second entry its index as provided by the datasheet
- clocks : Must contain an entry for each entry in clock-names.
- clock-names: Must include the following entries: "slow_clk", "main_xtal"

Optional properties:
- atmel,osc-bypass : boolean property. Set this when a clock signal is directly
  provided on XIN.

For example:
	pmc: pmc@f0018000 {
		compatible = "atmel,sama5d4-pmc", "syscon";
		reg = <0xf0018000 0x120>;
		interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
		#clock-cells = <2>;
		clocks = <&clk32k>, <&main_xtal>;
		clock-names = "slow_clk", "main_xtal";
	};
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/clock/atmel,at91rm9200-pmc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Atmel Power Management Controller (PMC)

maintainers:
  - Claudiu Beznea <claudiu.beznea@microchip.com>

description:
  The power management controller optimizes power consumption by controlling all
  system and user peripheral clocks. The PMC enables/disables the clock inputs
  to many of the peripherals and to the processor.

properties:
  compatible:
    oneOf:
      - items:
          - const: atmel,at91sam9g20-pmc
          - const: atmel,at91sam9260-pmc
          - const: syscon
      - items:
          - enum:
              - atmel,at91sam9g15-pmc
              - atmel,at91sam9g25-pmc
              - atmel,at91sam9g35-pmc
              - atmel,at91sam9x25-pmc
              - atmel,at91sam9x35-pmc
          - const: atmel,at91sam9x5-pmc
          - const: syscon
      - items:
          - enum:
              - atmel,at91rm9200-pmc
              - atmel,at91sam9260-pmc
              - atmel,at91sam9g45-pmc
              - atmel,at91sam9n12-pmc
              - atmel,at91sam9rl-pmc
              - atmel,at91sam9x5-pmc
              - atmel,sama5d2-pmc
              - atmel,sama5d3-pmc
              - atmel,sama5d4-pmc
              - microchip,sam9x60-pmc
              - microchip,sama7g5-pmc
          - const: syscon

  reg:
    maxItems: 1

  interrupts:
    maxItems: 1

  "#clock-cells":
    description: |
      - 1st cell is the clock type, one of PMC_TYPE_CORE, PMC_TYPE_SYSTEM,
        PMC_TYPE_PERIPHERAL, PMC_TYPE_GCK, PMC_TYPE_PROGRAMMABLE (as defined
        in <dt-bindings/clock/at91.h>)
      - 2nd cell is the clock identifier as defined in <dt-bindings/clock/at91.h
        (for core clocks) or as defined in datasheet (for system, peripheral,
        gck and programmable clocks).
    const: 2

  clocks:
    minItems: 2
    maxItems: 3

  clock-names:
    minItems: 2
    maxItems: 3

  atmel,osc-bypass:
    description: set when a clock signal is directly provided on XIN
    type: boolean

required:
  - compatible
  - reg
  - interrupts
  - "#clock-cells"
  - clocks
  - clock-names

allOf:
  - if:
      properties:
        compatible:
          contains:
            enum:
              - microchip,sam9x60-pmc
              - microchip,sama7g5-pmc
    then:
      properties:
        clocks:
          minItems: 3
          maxItems: 3
        clock-names:
          items:
            - const: td_slck
            - const: md_slck
            - const: main_xtal

  - if:
      properties:
        compatible:
          contains:
            enum:
              - atmel,at91rm9200-pmc
              - atmel,at91sam9260-pmc
              - atmel,at91sam9g20-pmc
    then:
      properties:
        clocks:
          minItems: 2
          maxItems: 2
        clock-names:
          items:
            - const: slow_xtal
            - const: main_xtal

  - if:
      properties:
        compatible:
          contains:
            enum:
              - atmel,sama5d2-pmc
              - atmel,sama5d3-pmc
              - atmel,sama5d4-pmc
    then:
      properties:
        clocks:
          minItems: 2
          maxItems: 2
        clock-names:
          items:
            - const: slow_clk
            - const: main_xtal

additionalProperties: false

examples:
  - |
    #include <dt-bindings/interrupt-controller/irq.h>

    pmc: clock-controller@f0018000 {
        compatible = "atmel,sama5d4-pmc", "syscon";
        reg = <0xf0018000 0x120>;
        interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
        #clock-cells = <2>;
        clocks = <&clk32k>, <&main_xtal>;
        clock-names = "slow_clk", "main_xtal";
    };

...
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/clock/atmel,at91sam9x5-sckc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Atmel Slow Clock Controller (SCKC)

maintainers:
  - Claudiu Beznea <claudiu.beznea@microchip.com>

properties:
  compatible:
    oneOf:
      - enum:
          - atmel,at91sam9x5-sckc
          - atmel,sama5d3-sckc
          - atmel,sama5d4-sckc
          - microchip,sam9x60-sckc
      - items:
          - const: microchip,sama7g5-sckc
          - const: microchip,sam9x60-sckc

  reg:
    maxItems: 1

  clocks:
    maxItems: 1

  "#clock-cells":
    enum: [0, 1]

  atmel,osc-bypass:
    type: boolean
    description: set when a clock signal is directly provided on XIN

required:
  - compatible
  - reg
  - clocks
  - "#clock-cells"

allOf:
  - if:
      properties:
        compatible:
          contains:
            enum:
              - microchip,sam9x60-sckc
    then:
      properties:
        "#clock-cells":
          const: 1
    else:
      properties:
        "#clock-cells":
          const: 0

additionalProperties: false

examples:
  - |
    clk32k: clock-controller@fffffe50 {
        compatible = "microchip,sam9x60-sckc";
        reg = <0xfffffe50 0x4>;
        clocks = <&slow_xtal>;
        #clock-cells = <1>;
    };

...
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@@ -24,6 +24,9 @@ properties:
  reg:
    maxItems: 1

  interrupts:
    maxItems: 2

  clocks:
    minItems: 6
    maxItems: 7
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@@ -98,9 +98,9 @@ required:

patternProperties:
  "^usb-phy@[a-f0-9]+$":
    allOf: [ $ref: "../phy/ingenic,phy-usb.yaml#" ]
    $ref: /schemas/phy/ingenic,phy-usb.yaml#
  "^mac-phy-ctrl@[a-f0-9]+$":
    allOf: [ $ref: "../net/ingenic,mac.yaml#" ]
    $ref: /schemas/net/ingenic,mac.yaml#

additionalProperties: false

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