Commit 3973bcc9 authored by Stephen Boyd's avatar Stephen Boyd
Browse files

Merge tag 'clk-microchip-6.5' of... 

Merge tag 'clk-microchip-6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into clk-microchip

Pull Microchip clk driver updates from Claudiu Beznea:

Polarfire:
 - new Kconfig symbol name (SOC_MICROCHIP_POLARFIRE) for Microchip FPGA
   clock drivers

PIC32:
 - use of_property_read_bool() to read "microchip,pic32mzda-sosc" boolean
   DT property in clk-pic32mzda

AT91:
 - convert clock dt-bindings to YAML

* tag 'clk-microchip-6.5' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
  dt-bindings: clocks: at91sam9x5-sckc: convert to yaml
  dt-bindings: clocks: atmel,at91rm9200-pmc: convert to yaml
  clk: microchip: Use of_property_read_bool() for boolean properties
  clk: microchip: convert SOC_MICROCHIP_POLARFIRE to ARCH_MICROCHIP_POLARFIRE
parents ac9a7868 9a7b0101

Documentation/devicetree/bindings/clock/at91-clock.txt

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Device Tree Clock bindings for arch-at91



This binding uses the common clock binding[1].



[1] Documentation/devicetree/bindings/clock/clock-bindings.txt



Slow Clock controller:



Required properties:

- compatible : shall be one of the following:

	"atmel,at91sam9x5-sckc",

	"atmel,sama5d3-sckc",

	"atmel,sama5d4-sckc" or

	"microchip,sam9x60-sckc":

		at91 SCKC (Slow Clock Controller)

- #clock-cells : shall be 1 for "microchip,sam9x60-sckc" otherwise shall be 0.

- clocks : shall be the input parent clock phandle for the clock.



Optional properties:

- atmel,osc-bypass : boolean property. Set this when a clock signal is directly

  provided on XIN.



For example:

	sckc@fffffe50 {

		compatible = "atmel,at91sam9x5-sckc";

		reg = <0xfffffe50 0x4>;

		clocks = <&slow_xtal>;

		#clock-cells = <0>;

	};



Power Management Controller (PMC):



Required properties:

- compatible : shall be "atmel,<chip>-pmc", "syscon" or

	"microchip,sam9x60-pmc"

	<chip> can be: at91rm9200, at91sam9260, at91sam9261,

	at91sam9263, at91sam9g45, at91sam9n12, at91sam9rl, at91sam9g15,

	at91sam9g25, at91sam9g35, at91sam9x25, at91sam9x35, at91sam9x5,

	sama5d2, sama5d3 or sama5d4.

- #clock-cells : from common clock binding; shall be set to 2. The first entry

  is the type of the clock (core, system, peripheral or generated) and the

  second entry its index as provided by the datasheet

- clocks : Must contain an entry for each entry in clock-names.

- clock-names: Must include the following entries: "slow_clk", "main_xtal"



Optional properties:

- atmel,osc-bypass : boolean property. Set this when a clock signal is directly

  provided on XIN.



For example:

	pmc: pmc@f0018000 {

		compatible = "atmel,sama5d4-pmc", "syscon";

		reg = <0xf0018000 0x120>;

		interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;

		#clock-cells = <2>;

		clocks = <&clk32k>, <&main_xtal>;

		clock-names = "slow_clk", "main_xtal";

	};

Documentation/devicetree/bindings/clock/atmel,at91rm9200-pmc.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/clock/atmel,at91rm9200-pmc.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Atmel Power Management Controller (PMC)



maintainers:

  - Claudiu Beznea <claudiu.beznea@microchip.com>



description:

  The power management controller optimizes power consumption by controlling all

  system and user peripheral clocks. The PMC enables/disables the clock inputs

  to many of the peripherals and to the processor.



properties:

  compatible:

    oneOf:

      - items:

          - const: atmel,at91sam9g20-pmc

          - const: atmel,at91sam9260-pmc

          - const: syscon

      - items:

          - enum:

              - atmel,at91sam9g15-pmc

              - atmel,at91sam9g25-pmc

              - atmel,at91sam9g35-pmc

              - atmel,at91sam9x25-pmc

              - atmel,at91sam9x35-pmc

          - const: atmel,at91sam9x5-pmc

          - const: syscon

      - items:

          - enum:

              - atmel,at91rm9200-pmc

              - atmel,at91sam9260-pmc

              - atmel,at91sam9g45-pmc

              - atmel,at91sam9n12-pmc

              - atmel,at91sam9rl-pmc

              - atmel,at91sam9x5-pmc

              - atmel,sama5d2-pmc

              - atmel,sama5d3-pmc

              - atmel,sama5d4-pmc

              - microchip,sam9x60-pmc

              - microchip,sama7g5-pmc

          - const: syscon



  reg:

    maxItems: 1



  interrupts:

    maxItems: 1



  "#clock-cells":

    description: |

      - 1st cell is the clock type, one of PMC_TYPE_CORE, PMC_TYPE_SYSTEM,

        PMC_TYPE_PERIPHERAL, PMC_TYPE_GCK, PMC_TYPE_PROGRAMMABLE (as defined

        in <dt-bindings/clock/at91.h>)

      - 2nd cell is the clock identifier as defined in <dt-bindings/clock/at91.h

        (for core clocks) or as defined in datasheet (for system, peripheral,

        gck and programmable clocks).

    const: 2



  clocks:

    minItems: 2

    maxItems: 3



  clock-names:

    minItems: 2

    maxItems: 3



  atmel,osc-bypass:

    description: set when a clock signal is directly provided on XIN

    type: boolean



required:

  - compatible

  - reg

  - interrupts

  - "#clock-cells"

  - clocks

  - clock-names



allOf:

  - if:

      properties:

        compatible:

          contains:

            enum:

              - microchip,sam9x60-pmc

              - microchip,sama7g5-pmc

    then:

      properties:

        clocks:

          minItems: 3

          maxItems: 3

        clock-names:

          items:

            - const: td_slck

            - const: md_slck

            - const: main_xtal



  - if:

      properties:

        compatible:

          contains:

            enum:

              - atmel,at91rm9200-pmc

              - atmel,at91sam9260-pmc

              - atmel,at91sam9g20-pmc

    then:

      properties:

        clocks:

          minItems: 2

          maxItems: 2

        clock-names:

          items:

            - const: slow_xtal

            - const: main_xtal



  - if:

      properties:

        compatible:

          contains:

            enum:

              - atmel,sama5d2-pmc

              - atmel,sama5d3-pmc

              - atmel,sama5d4-pmc

    then:

      properties:

        clocks:

          minItems: 2

          maxItems: 2

        clock-names:

          items:

            - const: slow_clk

            - const: main_xtal



additionalProperties: false



examples:

  - |

    #include <dt-bindings/interrupt-controller/irq.h>



    pmc: clock-controller@f0018000 {

        compatible = "atmel,sama5d4-pmc", "syscon";

        reg = <0xf0018000 0x120>;

        interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;

        #clock-cells = <2>;

        clocks = <&clk32k>, <&main_xtal>;

        clock-names = "slow_clk", "main_xtal";

    };



...

Documentation/devicetree/bindings/clock/atmel,at91sam9x5-sckc.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/clock/atmel,at91sam9x5-sckc.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Atmel Slow Clock Controller (SCKC)



maintainers:

  - Claudiu Beznea <claudiu.beznea@microchip.com>



properties:

  compatible:

    oneOf:

      - enum:

          - atmel,at91sam9x5-sckc

          - atmel,sama5d3-sckc

          - atmel,sama5d4-sckc

          - microchip,sam9x60-sckc

      - items:

          - const: microchip,sama7g5-sckc

          - const: microchip,sam9x60-sckc



  reg:

    maxItems: 1



  clocks:

    maxItems: 1



  "#clock-cells":

    enum: [0, 1]



  atmel,osc-bypass:

    type: boolean

    description: set when a clock signal is directly provided on XIN



required:

  - compatible

  - reg

  - clocks

  - "#clock-cells"



allOf:

  - if:

      properties:

        compatible:

          contains:

            enum:

              - microchip,sam9x60-sckc

    then:

      properties:

        "#clock-cells":

          const: 1

    else:

      properties:

        "#clock-cells":

          const: 0



additionalProperties: false



examples:

  - |

    clk32k: clock-controller@fffffe50 {

        compatible = "microchip,sam9x60-sckc";

        reg = <0xfffffe50 0x4>;

        clocks = <&slow_xtal>;

        #clock-cells = <1>;

    };



...

drivers/clk/microchip/Kconfig

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@@ -5,8 +5,8 @@ config COMMON_CLK_PIC32 


config MCHP_CLK_MPFS

	bool "Clk driver for PolarFire SoC"

	depends on SOC_MICROCHIP_POLARFIRE || COMPILE_TEST

	default SOC_MICROCHIP_POLARFIRE

	depends on ARCH_MICROCHIP_POLARFIRE || COMPILE_TEST

	default ARCH_MICROCHIP_POLARFIRE

	select AUXILIARY_BUS

	help

	  Supports Clock Configuration for PolarFire SoC

drivers/clk/microchip/clk-pic32mzda.c

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@@ -184,7 +184,7 @@ static int pic32mzda_clk_probe(struct platform_device *pdev) 
	clks[UPLLCLK] = clk_register_fixed_rate(&pdev->dev, "usbphy_clk", NULL,

						0, 24000000);

	/* fixed rate (optional) clock */

	if (of_find_property(np, "microchip,pic32mzda-sosc", NULL)) {

	if (of_property_read_bool(np, "microchip,pic32mzda-sosc")) {

		pr_info("pic32-clk: dt requests SOSC.\n");

		clks[SOSCCLK] = pic32_sosc_clk_register(&sosc_clk, core);

	}