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  1. Oct 15, 2011
    • Rafael J. Wysocki's avatar
      PCI / PM: Remove unnecessary error variable from acpi_dev_run_wake() · 78d090b0
      Rafael J. Wysocki authored
      
      
      The result returned by acpi_dev_run_wake() is always either -EINVAL
      or -ENODEV, while obviously it should return 0 on success.  The
      problem is that the leftover error variable, that's not really used
      in the function, is initialized with -ENODEV and then returned
      without modification.
      
      To fix this issue remove the error variable from acpi_dev_run_wake()
      and make the function return 0 on success as appropriate.
      
      Signed-off-by: default avatarRafael J. Wysocki <rjw@sisk.pl>
      Signed-off-by: default avatarJesse Barnes <jbarnes@virtuousgeek.org>
      78d090b0
    • Prarit Bhargava's avatar
      PCI hotplug: acpiphp: Prevent deadlock on PCI-to-PCI bridge remove · 6af8bef1
      Prarit Bhargava authored
      I originally submitted a patch to workaround this by pushing all Ejection
      Requests and Device Checks onto the kacpi_hotplug queue.
      
      http://marc.info/?l=linux-acpi&m=131678270930105&w=2
      
      
      
      The patch is still insufficient in that Bus Checks also need to be added.
      
      Rather than add all events, including non-PCI-hotplug events, to the
      hotplug queue, mjg suggested that a better approach would be to modify
      the acpiphp driver so only acpiphp events would be added to the
      kacpi_hotplug queue.
      
      It's a longer patch, but at least we maintain the benefit of having separate
      queues in ACPI.  This, of course, is still only a workaround the problem.
      As Bjorn and mjg pointed out, we have to refactor a lot of this code to do
      the right thing but at this point it is a better to have this code working.
      
      The acpi core places all events on the kacpi_notify queue.  When the acpiphp
      driver is loaded and a PCI card with a PCI-to-PCI bridge is removed the
      following call sequence occurs:
      
      cleanup_p2p_bridge()
      	    -> cleanup_bridge()
      		    -> acpi_remove_notify_handler()
      			    -> acpi_os_wait_events_complete()
      				    -> flush_workqueue(kacpi_notify_wq)
      
      which is the queue we are currently executing on and the process will hang.
      
      Move all hotplug acpiphp events onto the kacpi_hotplug workqueue.  In
      handle_hotplug_event_bridge() and handle_hotplug_event_func() we can simply
      push the rest of the work onto the kacpi_hotplug queue and then avoid the
      deadlock.
      
      Signed-off-by: default avatarPrarit Bhargava <prarit@redhat.com>
      Cc: mjg@redhat.com
      Cc: bhelgaas@google.com
      Cc: linux-acpi@vger.kernel.org
      Signed-off-by: default avatarJesse Barnes <jbarnes@virtuousgeek.org>
      6af8bef1
    • Rafael J. Wysocki's avatar
      PCI / PM: Extend PME polling to all PCI devices · 379021d5
      Rafael J. Wysocki authored
      
      
      The land of PCI power management is a land of sorrow and ugliness,
      especially in the area of signaling events by devices.  There are
      devices that set their PME Status bits, but don't really bother
      to send a PME message or assert PME#.  There are hardware vendors
      who don't connect PME# lines to the system core logic (they know
      who they are).  There are PCI Express Root Ports that don't bother
      to trigger interrupts when they receive PME messages from the devices
      below.  There are ACPI BIOSes that forget to provide _PRW methods for
      devices capable of signaling wakeup.  Finally, there are BIOSes that
      do provide _PRW methods for such devices, but then don't bother to
      call Notify() for those devices from the corresponding _Lxx/_Exx
      GPE-handling methods.  In all of these cases the kernel doesn't have
      a chance to receive a proper notification that it should wake up a
      device, so devices stay in low-power states forever.  Worse yet, in
      some cases they continuously send PME Messages that are silently
      ignored, because the kernel simply doesn't know that it should clear
      the device's PME Status bit.
      
      This problem was first observed for "parallel" (non-Express) PCI
      devices on add-on cards and Matthew Garrett addressed it by adding
      code that polls PME Status bits of such devices, if they are enabled
      to signal PME, to the kernel.  Recently, however, it has turned out
      that PCI Express devices are also affected by this issue and that it
      is not limited to add-on devices, so it seems necessary to extend
      the PME polling to all PCI devices, including PCI Express and planar
      ones.  Still, it would be wasteful to poll the PME Status bits of
      devices that are known to receive proper PME notifications, so make
      the kernel (1) poll the PME Status bits of all PCI and PCIe devices
      enabled to signal PME and (2) disable the PME Status polling for
      devices for which correct PME notifications are received.
      
      Tested-by: default avatarSarah Sharp <sarah.a.sharp@linux.intel.com>
      Signed-off-by: default avatarRafael J. Wysocki <rjw@sisk.pl>
      Signed-off-by: default avatarJesse Barnes <jbarnes@virtuousgeek.org>
      379021d5
    • Josh Boyer's avatar
      PCI quirk: mmc: Always check for lower base frequency quirk for Ricoh 1180:e823 · 3e309cdf
      Josh Boyer authored
      Commit 15bed0f2 added a quirk for the e823 Ricoh card reader to lower the
      base frequency.  However, the quirk first checks to see if the proprietary
      MMC controller is disabled, and returns if so.  On some devices, such as the
      Lenovo X220, the MMC controller is already disabled by firmware it seems,
      but the frequency change is still needed so sdhci-pci can talk to the cards.
      Since the MMC controller is disabled, the frequency fixup was never being run
      on these machines.
      
      This moves the e823 check above the MMC controller check so that it always
      gets run.
      
      This fixes https://bugzilla.redhat.com/show_bug.cgi?id=722509
      
      
      
      Signed-off-by: default avatarJosh Boyer <jwboyer@redhat.com>
      Signed-off-by: default avatarJesse Barnes <jbarnes@virtuousgeek.org>
      3e309cdf
    • Benjamin Herrenschmidt's avatar
      PCI: Make pci_setup_bridge() non-static for use by arch code · e2444273
      Benjamin Herrenschmidt authored
      
      
      The "powernv" platform of the powerpc architecture needs to assign PCI
      resources using a specific algorithm to fit some HW constraints of
      the IBM "IODA" architecture (related to the ability to create error
      handling domains that encompass specific segments of MMIO space).
      
      For doing so, it wants to call pci_setup_bridge() from architecture
      specific resource management in order to configure bridges after all
      resources have been assigned. So make it non-static.
      
      Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
      Signed-off-by: default avatarJesse Barnes <jbarnes@virtuousgeek.org>
      e2444273
    • Jan Beulich's avatar
      x86: constify PCI raw ops structures · 72da0b07
      Jan Beulich authored
      
      
      As with any other such change, the goal is to prevent inadvertent
      writes to these structures (assuming DEBUG_RODATA is enabled), and to
      separate data (possibly frequently) written to from such never getting
      modified.
      
      Reviewed-by: default avatarIngo Molnar <mingo@elte.hu>
      Signed-off-by: default avatarJan Beulich <jbeulich@novell.com>
      Signed-off-by: default avatarJesse Barnes <jbarnes@virtuousgeek.org>
      72da0b07
    • Ben Hutchings's avatar
      PCI: Add quirk for known incorrect MPSS · a94d072b
      Ben Hutchings authored
      
      
      Using legacy interrupts and TLPs > 256 bytes on the SFC4000 (all
      revisions) may cause interrupt messages to be replayed.  In some
      systems this results in a non-recoverable MCE.  Early boards using the
      SFC4000 set the maximum payload size supported (MPSS) to 1024 bytes
      and we should override that.
      
      There are probably other devices with similar issues, so give this
      quirk a generic name.
      
      Signed-off-by: default avatarBen Hutchings <bhutchings@solarflare.com>
      Signed-off-by: default avatarJesse Barnes <jbarnes@virtuousgeek.org>
      a94d072b
    • Ben Hutchings's avatar
      PCI: Add Solarflare vendor ID and SFC4000 device IDs · 937383a5
      Ben Hutchings authored
      
      
      These will be shared between the sfc driver and a PCI quirk.
      
      Signed-off-by: default avatarBen Hutchings <bhutchings@solarflare.com>
      Signed-off-by: default avatarJesse Barnes <jbarnes@virtuousgeek.org>
      937383a5
  2. Oct 14, 2011
  3. Oct 13, 2011
  4. Oct 12, 2011
  5. Oct 11, 2011
  6. Oct 10, 2011
  7. Oct 09, 2011
  8. Oct 08, 2011
  9. Oct 07, 2011
    • srinidhi kasagar's avatar
      ARM: mach-ux500: enable fix for ARM errata 754322 · 98e87d57
      srinidhi kasagar authored
      
      
      This applies ARM errata fix 754322 for all ux500 platforms.
      
      Cc: stable@kernel.org
      Signed-off-by: default avatarsrinidhi kasagar <srinidhi.kasagar@stericsson.com>
      Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
      98e87d57
    • Linus Torvalds's avatar
      Merge git://github.com/davem330/net · 3ee72ca9
      Linus Torvalds authored
      * git://github.com/davem330/net:
        net: fix typos in Documentation/networking/scaling.txt
        bridge: leave carrier on for empty bridge
        netfilter: Use proper rwlock init function
        tcp: properly update lost_cnt_hint during shifting
        tcp: properly handle md5sig_pool references
        macvlan/macvtap: Fix unicast between macvtap interfaces in bridge mode
      3ee72ca9
    • Paul Menzel's avatar
      x86/PCI: use host bridge _CRS info on ASUS M2V-MX SE · 29cf7a30
      Paul Menzel authored
      In summary, this DMI quirk uses the _CRS info by default for the ASUS
      M2V-MX SE by turning on `pci=use_crs` and is similar to the quirk
      added by commit 2491762c ("x86/PCI: use host bridge _CRS info on
      ASRock ALiveSATA2-GLAN") whose commit message should be read for further
      information.
      
      Since commit 3e3da00c ("x86/pci: AMD one chain system to use pci
      read out res") Linux gives the following oops:
      
          parport0: PC-style at 0x378, irq 7 [PCSPP,TRISTATE]
          HDA Intel 0000:20:01.0: PCI INT A -> GSI 17 (level, low) -> IRQ 17
          HDA Intel 0000:20:01.0: setting latency timer to 64
          BUG: unable to handle kernel paging request at ffffc90011c08000
          IP: [<ffffffffa0578402>] azx_probe+0x3ad/0x86b [snd_hda_intel]
          PGD 13781a067 PUD 13781b067 PMD 1300ba067 PTE 800000fd00000173
          Oops: 0009 [#1] SMP
          last sysfs file: /sys/module/snd_pcm/initstate
          CPU 0
          Modules linked in: snd_hda_intel(+) snd_hda_codec snd_hwdep snd_pcm_oss snd_mixer_oss snd_pcm snd_seq_midi snd_rawmidi snd_seq_midi_event tpm_tis tpm snd_seq tpm_bios psmouse parport_pc snd_timer snd_seq_device parport processor evdev snd i2c_viapro thermal_sys amd64_edac_mod k8temp i2c_core soundcore shpchp pcspkr serio_raw asus_atk0110 pci_hotplug edac_core button snd_page_alloc edac_mce_amd ext3 jbd mbcache sha256_generic cryptd aes_x86_64 aes_generic cbc dm_crypt dm_mod raid1 md_mod usbhid hid sg sd_mod crc_t10dif sr_mod cdrom ata_generic uhci_hcd sata_via pata_via libata ehci_hcd usbcore scsi_mod via_rhine mii nls_base [last unloaded: scsi_wait_scan]
          Pid: 1153, comm: work_for_cpu Not tainted 2.6.37-1-amd64 #1 M2V-MX SE/System Product Name
          RIP: 0010:[<ffffffffa0578402>]  [<ffffffffa0578402>] azx_probe+0x3ad/0x86b [snd_hda_intel]
          RSP: 0018:ffff88013153fe50  EFLAGS: 00010286
          RAX: ffffc90011c08000 RBX: ffff88013029ec00 RCX: 0000000000000006
          RDX: 0000000000000000 RSI: 0000000000000246 RDI: 0000000000000246
          RBP: ffff88013341d000 R08: 0000000000000000 R09: 0000000000000040
          R10: 0000000000000286 R11: 0000000000003731 R12: ffff88013029c400
          R13: 0000000000000000 R14: 0000000000000000 R15: ffff88013341d090
          FS:  0000000000000000(0000) GS:ffff8800bfc00000(0000) knlGS:00000000f7610ab0
          CS:  0010 DS: 0000 ES: 0000 CR0: 000000008005003b
          CR2: ffffc90011c08000 CR3: 0000000132f57000 CR4: 00000000000006f0
          DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000
          DR3: 0000000000000000 DR6: 00000000ffff0ff0 DR7: 0000000000000400
          Process work_for_cpu (pid: 1153, threadinfo ffff88013153e000, task ffff8801303c86c0)
          Stack:
           0000000000000005 ffffffff8123ad65 00000000000136c0 ffff88013029c400
           ffff8801303c8998 ffff88013341d000 ffff88013341d090 ffff8801322d9dc8
           ffff88013341d208 0000000000000000 0000000000000000 ffffffff811ad232
          Call Trace:
           [<ffffffff8123ad65>] ? __pm_runtime_set_status+0x162/0x186
           [<ffffffff811ad232>] ? local_pci_probe+0x49/0x92
           [<ffffffff8105afc5>] ? do_work_for_cpu+0x0/0x1b
           [<ffffffff8105afc5>] ? do_work_for_cpu+0x0/0x1b
           [<ffffffff8105afd0>] ? do_work_for_cpu+0xb/0x1b
           [<ffffffff8105fd3f>] ? kthread+0x7a/0x82
           [<ffffffff8100a824>] ? kernel_thread_helper+0x4/0x10
           [<ffffffff8105fcc5>] ? kthread+0x0/0x82
           [<ffffffff8100a820>] ? kernel_thread_helper+0x0/0x10
          Code: f4 01 00 00 ef 31 f6 48 89 df e8 29 dd ff ff 85 c0 0f 88 2b 03 00 00 48 89 ef e8 b4 39 c3 e0 8b 7b 40 e8 fc 9d b1 e0 48 8b 43 38 <66> 8b 10 66 89 14 24 8b 43 14 83 e8 03 83 f8 01 77 32 31 d2 be
          RIP  [<ffffffffa0578402>] azx_probe+0x3ad/0x86b [snd_hda_intel]
           RSP <ffff88013153fe50>
          CR2: ffffc90011c08000
          ---[ end trace 8d1f3ebc136437fd ]---
      
      Trusting the ACPI _CRS information (`pci=use_crs`) fixes this problem.
      
          $ dmesg | grep -i crs # with the quirk
          PCI: Using host bridge windows from ACPI; if necessary, use "pci=nocrs" and report a bug
      
      The match has to be against the DMI board entries though since the vendor entries are not populated.
      
          DMI: System manufacturer System Product Name/M2V-MX SE, BIOS 0304    10/30/2007
      
      This quirk should be removed when `pci=use_crs` is enabled for machines
      from 2006 or earlier or some other solution is implemented.
      
      Using coreboot [1] with this board the problem does not exist but this
      quirk also does not affect it either. To be safe though the check is
      tightened to only take effect when the BIOS from American Megatrends is
      used.
      
              15:13 < ruik> but coreboot does not need that
              15:13 < ruik> because i have there only one root bus
              15:13 < ruik> the audio is behind a bridge
      
              $ sudo dmidecode
              BIOS Information
                      Vendor: American Megatrends Inc.
                      Version: 0304
                      Release Date: 10/30/2007
      
      [1] http://www.coreboot.org/
      
      Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=30552
      
      
      
      Cc: stable@kernel.org (2.6.34)
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: Ingo Molnar <mingo@redhat.com>
      Cc: H. Peter Anvin <hpa@zytor.com>
      Cc: x86@kernel.org
      Signed-off-by: default avatarPaul Menzel <paulepanter@users.sourceforge.net>
      Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
      Acked-by: default avatarJesse Barnes <jbarnes@virtuousgeek.org>
      Signed-off-by: default avatarLinus Torvalds <torvalds@linux-foundation.org>
      29cf7a30