- Oct 04, 2020
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Olof Johansson authored
Merge tag 'visconti-initial-for-5.10-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/iwamatsu/linux-visconti into arm/dt Visconti5 SoC changes for v5.10 (take two) - Add dt-bindings for Toshiba Visconti ARM SoCs - Add dt-bindings for the TMPV7708 RM main board - Add initial support for Toshiba Visconti platform - Add device tree for TMPV7708 RM main board - Add information for Toshiba Visconti ARM SoCs to MAINTAINERS - Enable configs for Toshiba Visconti to arm64's defconfig * tag 'visconti-initial-for-5.10-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/iwamatsu/linux-visconti: arm64: defconfig: Enable configs for Toshiba Visconti MAINTAINERS: Add information for Toshiba Visconti ARM SoCs arm64: dts: visconti: Add device tree for TMPV7708 RM main board arm64: visconti: Add initial support for Toshiba Visconti platform dt-bindings: arm: toshiba: Add the TMPV7708 RM main board dt-bindings: arm: toshiba: add Toshiba Visconti ARM SoCs Link: https://lore.kernel.org/r/20200923085236.4hu53gmnnmqkttuy@toshiba.co.jp Signed-off-by: Olof Johansson <olof@lixom.net>
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Andre Przywara authored
Even though the SP804 binding allows to specify only one clock, the primecell driver requires a named clock to activate the bus clock. Specify the one clock three times and provide some clock-names, to make the DT match the SP804 and primecell binding. Link: https://lore.kernel.org/r/20200907121831.242281-3-andre.przywara@arm.com Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Olof Johansson <olof@lixom.net>
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Andre Przywara authored
Even though the SP804 binding allows to specify only one clock, the primecell driver requires a named clock to activate the bus clock. Specify the one clock three times and provide some clock-names, to make the DT match the SP804 and primecell binding. Also add the missing arm,primecell compatible string. Link: https://lore.kernel.org/r/20200907121831.242281-4-andre.przywara@arm.com Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Olof Johansson <olof@lixom.net>
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Andre Przywara authored
The SP805 DT binding requires two clocks to be specified, but the two LG platform DTs currently only specify one clock. In practice, Linux would pick a clock named "apb_pclk" for the bus clock, and the Linux (and U-Boot) SP805 driver would use the first clock to derive the actual watchdog counter frequency. Since currently both are the very same clock, we can just double the clock reference, and add the correct clock-names, to match the binding. Link: https://lore.kernel.org/r/20200907121831.242281-6-andre.przywara@arm.com Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Chanho Min <chanho.min@lge.com> Signed-off-by: Olof Johansson <olof@lixom.net>
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Daniel Palmer authored
Since the dtsi/dts files have been moved some includes are now broken so this fixes up the includes so the dtbs build again. Link: https://lore.kernel.org/r/20201002133418.2250277-6-daniel@0x0f.com Signed-off-by: Daniel Palmer <daniel@0x0f.com> Signed-off-by: Olof Johansson <olof@lixom.net>
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Daniel Palmer authored
Based on Arnd's comment[0] all of the MStar dtsi/dts files should have had a prefix. This moves the files, fixes the Makefile that generates dtbs and fixes up the MAINTAINERS entry. Fixing up some includes in the files themselves is left for a later commit as rolling it into this commit resulted in a confusing diff. 0 - https://lore.kernel.org/linux-arm-kernel/CAK8P3a0maQhfaerwG4KgFZOrUPwueKOp2+MOeG9C=+8ZNzc2Kg@mail.gmail.com/ Link: https://lore.kernel.org/r/20201002133418.2250277-5-daniel@0x0f.com Signed-off-by: Daniel Palmer <daniel@0x0f.com> Signed-off-by: Olof Johansson <olof@lixom.net>
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Daniel Palmer authored
Since we now have support for the interrupt controller pm_uart's interrupt is routed through it make sense to wire up it's interrupt in the device tree. The interrupt is the same for all known chips so it goes in the base dtsi. Link: https://lore.kernel.org/r/20201002133418.2250277-4-daniel@0x0f.com Signed-off-by: Daniel Palmer <daniel@0x0f.com> Signed-off-by: Olof Johansson <olof@lixom.net>
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Daniel Palmer authored
Add the IRQ and FIQ intc instances to the base MStar/SigmaStar v7 dtsi. All of the known SoCs have both and at the same place with their common IPs using the same interrupt lines. Link: https://lore.kernel.org/r/20201002133418.2250277-3-daniel@0x0f.com Signed-off-by: Daniel Palmer <daniel@0x0f.com> Signed-off-by: Olof Johansson <olof@lixom.net>
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git://github.com/hisilicon/linux-hisiOlof Johansson authored
ARM: DT: Hisilicon ARM32 SoCs DT updates for 5.10 (take two) - Fix the system controller compatible for the hi3620 and hip04 SoCs - Add the basic device tree for the hisilicon SD5203 SoC * tag 'hisi-arm32-dt-for-5.10-tag2' of git://github.com/hisilicon/linux-hisi: ARM: dts: hisilicon: add SD5203 dts ARM: dts: hisilicon: fix the system controller compatible nodes Link: https://lore.kernel.org/r/5F742717.5080405@hisilicon.com Signed-off-by: Olof Johansson <olof@lixom.net>
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Olof Johansson authored
Merge tag 'omap-for-v5.10/dt-part2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/dt More dts changes for omaps for v5.10 merge window Some more dts changes that did not make it to the first set of dts changes: - Drop unnessary nokia,nvm-size property - A series of changes to use "okay" instead of "ok" - A series of changes to move boards to use new cpsw switch driver and drop the drop legacy cpsw dt node - A series of changes to fix issues with the GPIO binding usage * tag 'omap-for-v5.10/dt-part2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: dts: am3874: iceboard: fix GPIO expander reset GPIOs ARM: dts: am335x: t335: align GPIO hog names with dtschema ARM: dts: am335x: lxm: fix PCA9539 GPIO expander properties ARM: dts: am437x-l4: drop legacy cpsw dt node ARM: dts: am437x: switch to new cpsw switch drv ARM: dts: am437x-l4: add dt node for new cpsw switchdev driver ARM: dts: dra7: drop legacy cpsw dt node ARM: dts: am57xx-cl-som-am57x: switch to new cpsw switch drv ARM: dts: dra7x-evm: switch to new cpsw switch drv ARM: dts: beagle-x15: switch to new cpsw switch drv ARM: dts: am57xx-idk: switch to new cpsw switch drv ARM: dts: am5729: beagleboneai: switch to new cpsw switch drv ARM: dts: am43xx: replace status value "ok" by "okay" ARM: dts: dra7xx: replace status value "ok" by "okay" ARM: dts: omap: replace status value "ok" by "okay" ARM: dts: n9, n950: Remove nokia,nvm-size property Link: https://lore.kernel.org/r/pull-1601445968-476435@atomide.com-2 Signed-off-by: Olof Johansson <olof@lixom.net>
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https://github.com/Xilinx/linux-xlnxOlof Johansson authored
arm64: soc: ZynqMP DT changes for v5.10 - Fix IRQ flag for PMIC - Align gpio hogs and leds with naming convention - Rename busses to match DT schema - Tune i2c cadence compatible string - Remove undocumented u-boot properties * tag 'zynqmp-dt-for-v5.10' of https://github.com/Xilinx/linux-xlnx: arm64: dts: zynqmp: Fix leds subnode name for zcu100/ultra96 v1 arm64: dts: zynqmp: Remove undocumented u-boot properties arm64: dts: zynqmp: Remove additional compatible string for i2c IPs arm64: dts: zynqmp: Rename buses to be align with simple-bus yaml arm64: dts: xilinx: align GPIO hog names with dtschema arm64: dts: zynqmp-zcu100-revC: correct interrupt flags arm64: dts: xilinx: Align IOMMU nodename with dtschema arm64: dts: zynqmp: Add GTR transceivers Link: https://lore.kernel.org/r/37a0333b-541e-649c-68c5-aa4b52e6b91d@monstr.eu Signed-off-by: Olof Johansson <olof@lixom.net>
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Olof Johansson authored
Merge tag 'sunxi-dt-for-5.10-2' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/dt A few more DT patches for 5.10, to support simple-framebuffer on the v3s and the pinecube board * tag 'sunxi-dt-for-5.10-2' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: ARM: dts: sun8i: v3s: Add simple-framebuffer ARM: dts: sun8i: s3l: add support for Pine64 PineCube IP camera dt-bindings: arm: sunxi: add Pine64 PineCube binding ARM: dts: sun8i: V3/V3s/S3/S3L: add pinctrl for I2C1 at PE bank ARM: dts: sun8i: V3/V3s/S3/S3L: add pinctrl for 8-bit parallel CSI ARM: dts: sun8i: V3/V3s/S3/S3L: add CSI1 device node ARM: dts: sun8i: V3/V3s/S3/S3L: add pinctrl for UART2 RX/TX ARM: dts: sun8i: V3/V3s/S3/S3L: add Ethernet support Link: https://lore.kernel.org/r/e7c12b59-8603-438d-908b-5f0bde2c8697.lettre@localhost Signed-off-by: Olof Johansson <olof@lixom.net>
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Olof Johansson authored
Merge tag 'v5.10-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dt cpu-supply fixes (supply for each cpu core not only cpu0) and a spelling for the status property. * tag 'v5.10-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: ARM: dts: rockchip: replace status value "ok" by "okay" ARM: dts: rockchip: update cpu supplies on rk3066a ARM: dts: rockchip: rk3066a: add label to cpu@1 ARM: dts: rockchip: update cpu supplies on rk3288 Link: https://lore.kernel.org/r/1834049.gShM3QRH0n@diego Signed-off-by: Olof Johansson <olof@lixom.net>
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Olof Johansson authored
Merge tag 'actions-arm64-dt-for-v5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/mani/linux-actions into arm/dt Actions Semi ARM64 DT for v5.10: - Fix the memory region used by pinctrl and sps drivers on the S700 SoC. The issue is fixed by limiting the address space used by pinctrl driver. In hardware these two are separate subsystems but the hw engineers somehow merged the registers space into one. So we now limit the address space with appropriate offsets for the two drivers. - Add DMA controller support for S700 SoC. The relevant driver changes are picked up by DMA Engine mainatainer. The DMA on this SoC can be used for mem-to-mem and mem-to-peripheral transfers. * tag 'actions-arm64-dt-for-v5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/mani/linux-actions: arm64: dts: actions: Add DMA Controller for S700 arm64: dts: actions: limit address range for pinctrl node Link: https://lore.kernel.org/r/20200922114030.GC11251@Mani-XPS-13-9360 Signed-off-by: Olof Johansson <olof@lixom.net>
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Olof Johansson authored
Merge tag 'actions-arm-dt-for-v5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/mani/linux-actions into arm/dt Actions Semi ARM DT for v5.10: - Add devicetree support for Caninos Loucos Labrador SBC manufactured by Laboratory of Integrated Technological Systems (LSI-TEC), Brazil. This board is based on Actions Semi S500 SoC. More information about this board can be found in their website: https://caninosloucos.org/en/ - Fix PPI interrupt specifiers for peripherals attached to Cortex-A9 CPU - Add devicetree support for RoseapplePi SBC manufactured by Roseapple Pi team in Taiwan. This board is based on Actions Semi S500 SoC. More information about this board can be found in their website: http://roseapplepi.org/ * tag 'actions-arm-dt-for-v5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/mani/linux-actions: ARM: dts: owl-s500: Add RoseapplePi ARM: dts: owl-s500: Fix incorrect PPI interrupt specifiers ARM: dts: Add Caninos Loucos Labrador v2 Link: https://lore.kernel.org/r/20200922113712.GB11251@Mani-XPS-13-9360 Signed-off-by: Olof Johansson <olof@lixom.net>
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Olof Johansson authored
Merge tag 'actions-bindings-for-v5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/mani/linux-actions into arm/dt Actions Semi bindings for v5.10 - Add vendor prefix for Roseapple Pi: http://roseapplepi.org/ - Document RoseapplePi SBC manufactured by Roseapple Pi team in Taiwan. This board is based on Actions Semi S500 SoC. More information about this board can be found in their website: http://roseapplepi.org/index.php/spec/ - Add vendor prefix for Caninos Loucos Program: https://caninosloucos.org/en/program-en/ - Document Caninos Loucos Labrador SBC manufactured by Laboratory of Integrated Technological Systems (LSI-TEC), Brazil. This board is based on Actions Semi S500 SoC. More information about this board can be found in their website: https://caninosloucos.org/en/labrador-32-en/ * tag 'actions-bindings-for-v5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/mani/linux-actions: dt-bindings: arm: actions: Document RoseapplePi dt-bindings: Add vendor prefix for RoseapplePi.org dt-bindings: arm: actions: Document Caninos Loucos Labrador dt-bindings: Add vendor prefix for Caninos Loucos Link: https://lore.kernel.org/r/20200922113408.GA11251@Mani-XPS-13-9360 Signed-off-by: Olof Johansson <olof@lixom.net>
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Olof Johansson authored
Merge tag 'sunxi-dt-for-5.10-1' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/dt Our usual bunch of patches to support the Allwinner SoCs, this time adding: - Allwinner A100 initial support - Mali, DMA, cedrus and IR Support for the R40 - Crypto support for the v3s - New board: Allwinner A100 Perf1 * tag 'sunxi-dt-for-5.10-1' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: (24 commits) ARM: dts: sun8i: v3s: Enable crypto engine dt-bindings: crypto: Add compatible for V3s dt-bindings: crypto: Specify that allwinner, sun8i-a33-crypto needs reset arm64: dts: allwinner: a64: Update the audio codec compatible arm64: dts: allwinner: a64: Update codec widget names ARM: dts: sun8i: a33: Update codec widget names ARM: dts: sun8i: r40: Add video engine node ARM: dts: sun8i: r40: Add node for system controller dt-bindings: sram: allwinner, sun4i-a10-system-control: Add R40 compatibles ARM: dts: sun8i: r40: bananapi-m2-ultra: Enable IR ARM: dts: sun8i: r40: Add IR nodes dt-bindings: media: allwinner, sun4i-a10-ir: Add R40 compatible ARM: dts: sun8i: r40: Add DMA node dt-bindings: dma: allwinner,sun50i-a64-dma: Add R40 compatible arm64: allwinner: A100: add support for Allwinner Perf1 board dt-bindings: arm: sunxi: Add Allwinner A100 Perf1 Board bindings arm64: allwinner: A100: add the basical Allwinner A100 DTSI file dt-bindings: irq: sun7i-nmi: Add binding for A100's NMI controller dt-bindings: irq: sun7i-nmi: fix dt-binding for a80 nmi ARM: dts: sun4i: Enable HDMI support on the Mele A1000 ... Link: https://lore.kernel.org/r/ac39ee89-ea3a-4971-8cd7-8c4b2ecef39d.lettre@localhost Signed-off-by: Olof Johansson <olof@lixom.net>
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Olof Johansson authored
Merge tag 'amlogic-dt-2' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into arm/dt ARM: dts: amlogic updates for v5.10 (round 2) - GPU: remove invalid interrupt lines * tag 'amlogic-dt-2' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: ARM: dts: meson8: remove two invalid interrupt lines from the GPU node Link: https://lore.kernel.org/r/20200917165040.22908-2-krzk@kernel.org Link: https://lore.kernel.org/r/20200917165040.22908-1-krzk@kernel.org Link: https://lore.kernel.org/r/7hsgawl9h2.fsf@baylibre.com Signed-off-by: Olof Johansson <olof@lixom.net>
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Olof Johansson authored
Merge tag 'ti-k3-dt-for-v5.10-part2' of git://git.kernel.org/pub/scm/linux/kernel/git/nmenon/linux into arm/dt Second and final device tree updates towards 5.10-rc1 for TI K3 platform. * tag 'ti-k3-dt-for-v5.10-part2' of git://git.kernel.org/pub/scm/linux/kernel/git/nmenon/linux: (23 commits) arm64: dts: ti: k3-j7200-common-proc-board: Add USB support arm64: dts: ti: k3-j7200-common-proc-board: Configure the SERDES lane function arm64: dts: ti: k3-j7200-main: Add USB controller arm64: dts: ti: k3-j7200-main.dtsi: Add USB to SERDES lane MUX arm64: dts: ti: k3-j7200-main: Add SERDES lane control mux dt-bindings: ti-serdes-mux: Add defines for J7200 SoC arm64: dts: ti: k3-j721e-common-proc-board: align GPIO hog names with dtschema arm64: dts: ti: k3-j7200-common-proc-board: Add support for eMMC and SD card arm64: dts: ti: k3-j7200-main: Add support for MMC/SD controller nodes arm64: dts: ti: k3-j7200-som-p0: Add HyperFlash node arm64: dts: ti: k3-j7200-mcu-wakeup: Add HyperBus node arm64: dts: ti: k3-j7200-common-proc-board: Add I2C IO expanders arm64: dts: ti: k3-j7200: Add I2C nodes arm64: dts: ti: k3-j7200-common-proc-board: add mcu cpsw nuss pinmux and phy defs arm64: dts: ti: k3-j7200-mcu: add mcu cpsw nuss node arm64: dts: ti: k3-j7200-main: add main navss cpts node arm64: dts: ti: k3-j7200: add DMA support arm64: dts: ti: Add support for J7200 Common Processor Board arm64: dts: ti: Add support for J7200 SoC dt-bindings: arm: ti: Add bindings for J7200 SoC ... Link: https://lore.kernel.org/r/20201002134559.orvmgbns57qlyn3i@akan Signed-off-by: Olof Johansson <olof@lixom.net>
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- Oct 03, 2020
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Martin Blumenstingl authored
The 3.10 vendor kernel defines the following GPU 20 interrupt lines: #define INT_MALI_GP AM_IRQ(160) #define INT_MALI_GP_MMU AM_IRQ(161) #define INT_MALI_PP AM_IRQ(162) #define INT_MALI_PMU AM_IRQ(163) #define INT_MALI_PP0 AM_IRQ(164) #define INT_MALI_PP0_MMU AM_IRQ(165) #define INT_MALI_PP1 AM_IRQ(166) #define INT_MALI_PP1_MMU AM_IRQ(167) #define INT_MALI_PP2 AM_IRQ(168) #define INT_MALI_PP2_MMU AM_IRQ(169) #define INT_MALI_PP3 AM_IRQ(170) #define INT_MALI_PP3_MMU AM_IRQ(171) #define INT_MALI_PP4 AM_IRQ(172) #define INT_MALI_PP4_MMU AM_IRQ(173) #define INT_MALI_PP5 AM_IRQ(174) #define INT_MALI_PP5_MMU AM_IRQ(175) #define INT_MALI_PP6 AM_IRQ(176) #define INT_MALI_PP6_MMU AM_IRQ(177) #define INT_MALI_PP7 AM_IRQ(178) #define INT_MALI_PP7_MMU AM_IRQ(179) However, the driver from the 3.10 vendor kernel does not use the following four interrupt lines: - INT_MALI_PP3 - INT_MALI_PP3_MMU - INT_MALI_PP7 - INT_MALI_PP7_MMU Drop the "pp3" and "ppmmu3" interrupt lines. This is also important because there is no matching entry in interrupt-names for it (meaning the "pp2" interrupt is actually assigned to the "pp3" interrupt line). Fixes: 7d3f6b53 ("ARM: dts: meson8: add the Mali-450 MP6 GPU") Reported-by: Thomas Graichen <thomas.graichen@gmail.com> Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Tested-by: thomas graichen <thomas.graichen@gmail.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Link: https://lore.kernel.org/r/20200815181957.408649-1-martin.blumenstingl@googlemail.com
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- Sep 30, 2020
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Roger Quadros authored
The board uses lane 3 of SERDES for USB. Set the mux accordingly. The USB controller and EVM supports super-speed for USB0 on the Type-C port. However, the SERDES has a limitation that upto 2 protocols can be used at a time. The SERDES is wired for PCIe, QSGMII and USB super-speed. It has been chosen to use PCI2 and QSGMII as default. So restrict USB0 to high-speed mode. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com> Link: https://lore.kernel.org/r/20200930122032.23481-7-rogerq@ti.com
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Kishon Vijay Abraham I authored
First two lanes of SERDES is connected to PCIe, third lane is connected to QSGMII and the last lane is connected to USB. However, Cadence torrent SERDES doesn't support more than 2 protocols at the same time. Configure it only for PCIe and QSGMII. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com> Link: https://lore.kernel.org/r/20200930122032.23481-6-rogerq@ti.com
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Roger Quadros authored
j7200 has on USB controller instance. Add that. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com> Link: https://lore.kernel.org/r/20200930122032.23481-5-rogerq@ti.com
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Roger Quadros authored
The USB controller can be connected to one of the 2 lanes of SERDES0 using a MUX. Add a MUX controller node for that. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com> Link: https://lore.kernel.org/r/20200930122032.23481-4-rogerq@ti.com
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Roger Quadros authored
The SERDES lane control mux registers are present in the CTRLMMR space. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com> Link: https://lore.kernel.org/r/20200930122032.23481-3-rogerq@ti.com
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Roger Quadros authored
There are 4 lanes in each J7200 SERDES. Each SERDES lane mux can select upto 4 different IPs. Define all the possible functions. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Peter Rosin <peda@axentia.se> Cc: Peter Rosin <peda@axentia.se> Link: https://lore.kernel.org/r/20200930122032.23481-2-rogerq@ti.com
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Nishanth Menon authored
Merge fix up for TI serdes mux definition introduced in 5.9 as dependency for 5.10 series on J7200 USB. Signed-off-by: Nishanth Menon <nm@ti.com>
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Kefeng Wang authored
Add sd5203.dts for Hisilicon SD5203 SoC platform. Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com> Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
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Zhen Lei authored
The DT binding for Hisilicon system controllers require to have a "syscon" compatible string. Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
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- Sep 29, 2020
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Michal Simek authored
Fix the leds subnode names to match (^led-[0-9a-f]$|led). Similar change has been also done by commit 08dc0e5d ("arm64: dts: meson: fix leds subnodes name"). The patch is fixing this warning: avnet-ultra96-rev1.dt.yaml: leds: 'ds2', 'ds3', 'ds4', 'ds5' do not match any of the regexes: '(^led-[0-9a-f]$|led)', 'pinctrl-[0-9]+' Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/1a69c3fa0291f991ffcf113ea222c713ba4d4ff0.1598264917.git.michal.simek@xilinx.com
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Michal Simek authored
u-boot, DT properties are not documented anywhere in Linux DT binding that's why remove them. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/8ba339425b9c9f319bdedce7741367055a30713c.1598257720.git.michal.simek@xilinx.com Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
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Michal Simek authored
DT binding permits only one compatible string which was decribed in past by commit 63cab195 ("i2c: removed work arounds in i2c driver for Zynq Ultrascale+ MPSoC"). The commit aea37006 ("dt-bindings: i2c: cadence: Migrate i2c-cadence documentation to YAML") has converted binding to yaml and the following issues is reported: ...: i2c@ff030000: compatible: Additional items are not allowed ('cdns,i2c-r1p10' was unexpected) From schema: .../Documentation/devicetree/bindings/i2c/cdns,i2c-r1p10.yaml fds ...: i2c@ff030000: compatible: ['cdns,i2c-r1p14', 'cdns,i2c-r1p10'] is too long The commit c415f9e8 ("ARM64: zynqmp: Fix i2c node's compatible string") has added the second compatible string but without removing origin one. The patch is only keeping one compatible string "cdns,i2c-r1p14". Fixes: c415f9e8 ("ARM64: zynqmp: Fix i2c node's compatible string") Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/cc294ae1a79ef845af6809ddb4049f0c0f5bb87a.1598259551.git.michal.simek@xilinx.com Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
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Michal Simek authored
Rename amba-apu and amba to AXI. Based on Xilinx ZynqMP TRM (Chapter 15) chip is "using the advanced eXtensible interface (AXI) point-to-point channels for communicating addresses, data, and response transactions between master and slave clients." Issues are reported as: ...: amba: $nodename:0: 'amba' does not match '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$' From schema: .../dt-schema/dtschema/schemas/simple-bus.yaml ...: amba-apu@0: $nodename:0: 'amba-apu@0' does not match '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$' From schema: .../dt-schema/dtschema/schemas/simple-bus.yaml Signed-off-by: Michal Simek <michal.simek@xilinx.com> Link: https://lore.kernel.org/r/68f20a2b2bb0feee80bc3348619c2ee98aa69963.1598263539.git.michal.simek@xilinx.com Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
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Krzysztof Kozlowski authored
The convention for node names is to use hyphens, not underscores. dtschema for pca95xx expects GPIO hogs to end with 'hog' prefix. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20200916155715.21009-8-krzk@kernel.org Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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- Sep 28, 2020
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Martin Cerveny authored
Add support for "allwinner,simple-framebuffer" with "mixer0-lcd0" pipeline from boot loader (u-boot). It depends on boot loader implementation of DE2/TCON0 setup with LCD. Signed-off-by: Martin Cerveny <m.cerveny@computer.org> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20200916175941.8448-1-m.cerveny@computer.org
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Icenowy Zheng authored
The Pine64 PineCube IP camera is an IP camera with SoChip S3 SoC. It comes with a main board, an expansion board and a camera. The main board features a Micro-USB power-only jack, a USB Type-A port, an Ethernet port connected to the internal PHY of the SoC and a Realtek RTL8189ES SDIO Wi-Fi module. A RGB LCD connector is reserved on the board. The expansion board features a TF slot, a microphone, a speaker connector with on-board amplifier and a few IR LEDs. Add support for the kit, with features on the main board and the expansion board now. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20200923010215.148819-2-icenowy@aosc.io
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Icenowy Zheng authored
Document board compatible names for Pine64 PineCube IP camera. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20200923010215.148819-1-icenowy@aosc.io
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Icenowy Zheng authored
I2C1 controller is available at PE bank, usually used for connecting an I2C-controlled camera sensor. Add pinctrl node for it. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20200923010014.148482-2-icenowy@aosc.io
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Icenowy Zheng authored
The CSI1 controller of V3/V3s/S3/S3L SoCs is used for parallel CSI. As we're going to add support for Pine64 SCC board, which uses 8-bit parallel CSI (and the MCLK output), add the pinctrl node of 8-bit CSI and MCLK to the DTSI file. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20200923010122.148661-1-icenowy@aosc.io
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Icenowy Zheng authored
The CSI1 controller of V3/V3s/S3/S3L chips is used for parallel CSI. Add the device tree node of it. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20200923005858.148261-2-icenowy@aosc.io
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