- Oct 06, 2017
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Chen-Yu Tsai authored
The Banana Pi M2 Ultra is an SBC based on the Allwinner R40 SoC. The form factor and position of various connectors, leds and buttons is similar to the Banana Pi M1+, Banana Pi M3, and is exactly the same as the latest Banana Pi M64. It features: - X-Powers AXP221s PMIC connected to i2c0 - 2 GB DDR3 DRAM - 8 GB eMMC - micro SD card slot - DC power jack - HDMI output - MIPI DSI connector - 2x USB 2.0 hosts - 1x USB 2.0 OTG - gigabit ethernet with Realtek RTL8211E transceiver - WiFi/Bluetooth with AP6212 chip, with external antenna connector - SATA and power connectors for native SATA support - camera sensor connector - consumer IR receiver - audio out headphone jack - onboard microphone - red, green, and blue LEDs - debug UART pins - Li-Po battery connector - Raspberry Pi B+ compatible GPIO header - power, reset, and boot control buttons This patch adds a dts file that enables UART, MMC and PMIC support. Signed-off-by:
Chen-Yu Tsai <wens@csie.org> Signed-off-by:
Icenowy Zheng <icenowy@aosc.io> Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com>
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Chen-Yu Tsai authored
The Allwinner R40 SoC is marketed as the successor to the A20 SoC. The R40 is a smaller chip than the A20, but features the same set of programmable pins, with a couple extra pins and some new pin functions. The chip features 4 Cortex-A7 cores and a Mali-400 MP2 GPU. It retains most if not all features from the A20, while adding some new features, such as MIPI DSI output, or updating various hardware blocks, such as DE 2.0. Signed-off-by:
Chen-Yu Tsai <wens@csie.org> Signed-off-by:
Icenowy Zheng <icenowy@aosc.io> Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com>
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- Sep 27, 2017
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Corentin LABBE authored
This patch remove leading 0 of unit address and so remove lots of warning when building DT with W=1. Signed-off-by:
Corentin Labbe <clabbe.montjoie@gmail.com> Acked-by:
Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by:
Chen-Yu Tsai <wens@csie.org>
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Corentin LABBE authored
This patch fixes the warning "xxx has a unit name, but no reg property" by removing "@0" from such node. 6 board files are fixed. Each has the same aforementioned issue in pinmux nodes. These include the Nano Pi family base dtsi file, the Orange Pi 2, Orange Pi Lite, Orange Pi One, Orange Pi PC, and Orange Pi Plus. Signed-off-by:
Corentin Labbe <clabbe.montjoie@gmail.com> Acked-by:
Maxime Ripard <maxime.ripard@free-electrons.com> [wens@csie.org: Squashed 6 patches together; boards named in commit log] Signed-off-by:
Chen-Yu Tsai <wens@csie.org>
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- Sep 26, 2017
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Corentin LABBE authored
This patch fix the warning "xxx has a unit name, but no reg property" by removing "@0" from such node. Signed-off-by:
Corentin Labbe <clabbe.montjoie@gmail.com> Acked-by:
Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by:
Chen-Yu Tsai <wens@csie.org>
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Corentin LABBE authored
The unit address and register address does not match. This patch fix the register address with the good one. Acked-by:
Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by:
Corentin Labbe <clabbe.montjoie@gmail.com> Signed-off-by:
Chen-Yu Tsai <wens@csie.org>
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Corentin LABBE authored
This patch remove leading 0 of unit address and so remove lots of warning when building DT with W=1. Signed-off-by:
Corentin Labbe <clabbe.montjoie@gmail.com> Acked-by:
Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by:
Chen-Yu Tsai <wens@csie.org>
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- Sep 17, 2017
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Icenowy Zheng authored
The Lamobo R1 board connected the ACIN of the AXP209 PMIC to a MicroUSB port, and the battery input is connected to a generic connector. Enable these two power supplies in the device tree. Signed-off-by:
Icenowy Zheng <icenowy@aosc.io> Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com>
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Chen-Yu Tsai authored
The TCONs on A31/A31s can select either backend as its input. As there is no configurable mux in the backend or DRC to redirect their output, or for the DRC to select an input, the connections are presumably from the each DRC to each TCON, with the TCON having two input ports, like the following diagram: Backend 0 ------- DRC 0 ------- [0] TCON 0 -- -- [1] \ / X / \ -- -- [0] Backend 1 ------- DRC 1 ------- [1] TCON 1 Add these connection endpoints to the device tree. Signed-off-by:
Chen-Yu Tsai <wens@csie.org> Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com>
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Philipp Rossak authored
There is no need for pincontrol nodes when the pin is set to a GPIO Signed-off-by:
Philipp Rossak <embed3d@gmail.com> Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com>
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Marcus Cooper authored
Add the new DAI blocks to the device tree. I2S0 and I2S1 are for connecting to an external codec. Signed-off-by:
Marcus Cooper <codekipper@gmail.com> Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com>
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Philipp Rossak authored
The WiFi side of the AP6212 WiFi/BT combo module is connected to mmc1. There are also GPIOs for enable and interrupts. Enable WiFi on this board by enabling mmc1 and adding the power sequencing clocks and GPIO, as well as the chip's interrupt line. Signed-off-by:
Philipp Rossak <embed3d@gmail.com> Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com>
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Maxime Ripard authored
The TBS A711 is a tablet with an A83T, a modem, wifi/BT chip, an eMMC and a 1024x600 LVDS display. Reviewed-by:
Chen-Yu Tsai <wens@csie.org> Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com>
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Priit Laes authored
sun4i-a10.dtsi was missing i2s0 block. Add it. Signed-off-by:
Priit Laes <plaes@plaes.org> Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com>
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Marcus Cooper authored
Add the new DAI blocks to the device tree. Signed-off-by:
Marcus Cooper <codekipper@gmail.com> Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com>
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Maxime Ripard authored
The A83T has an UART1 controller, with the RTS and CTS pins routed so it can be used for devices with hardware flow control, like a bluetooth chip. Acked-by:
Chen-Yu Tsai <wens@csie.org> Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com>
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Maxime Ripard authored
Add the pinctrl definitions for the A83t MMC1 controller. Acked-by:
Chen-Yu Tsai <wens@csie.org> Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com>
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Maxime Ripard authored
Those nodes are useless, remove them. Acked-by:
Chen-Yu Tsai <wens@csie.org> Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com>
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Stefan Mavrodiev authored
From revision J the board uses new phy chip LAN8710. Compared with RTL8201, RA17 pin is TXERR. It has pullup which causes phy not to work. To fix this PA17 is muxed with GMAC function. This makes the pin output-low. This patch is compatible with earlier board revisions, since this pin wasn't connected to phy. Signed-off-by:
Stefan Mavrodiev <stefan@olimex.com> Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com>
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Philipp Rossak authored
The BT side of the AP6212 WiFi/BT combo module is connected to uart3. Enable BT on this board by enabling uart3 with using additionally the cts and rts pins. Signed-off-by:
Philipp Rossak <embed3d@gmail.com> Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com>
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Philipp Rossak authored
This node adds the definition for the UART3 RTS and CTS Pins That makes it able to use UART3 with RTS and CTS. Signed-off-by:
Philipp Rossak <embed3d@gmail.com> Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com>
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Philipp Rossak authored
The Nanopi M1 Plus has an onboard IR receiver. This enables the onboard IR receiver subnode. Signed-off-by:
Philipp Rossak <embed3d@gmail.com> Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com>
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Philipp Rossak authored
The Nanopi M1 has an onboard IR receiver. This enables the onboard IR receiver subnode. Signed-off-by:
Philipp Rossak <embed3d@gmail.com> Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com>
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Harald Geyer authored
The axp209.dtsi defines nodes for ac, usb and battery supplies for a while now. This patch enables these nodes for the A20-Olinuxino-Micro, which has connectors for all three of them. The patch was run-tested against linux-next-20170825. Signed-off-by:
Harald Geyer <harald@ccbib.org> Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com>
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Stefan Mavrodiev authored
A20-OLinuXino-MICRO has option with onboard eMMC chip. For now it's only shipped with 4BG chip, but in the future this may change. Signed-off-by:
Stefan Mavrodiev <stefan@olimex.com> Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com>
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Priit Laes authored
Convert sun4i-a10.dtsi to new CCU driver. Tested on Gemei G9 tablet. Signed-off-by:
Priit Laes <plaes@plaes.org> Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com>
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Priit Laes authored
Convert sun7i-a20.dtsi to new CCU driver. Tested on Cubietruck. Signed-off-by:
Priit Laes <plaes@plaes.org> Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com>
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Chen-Yu Tsai authored
When the second display pipeline device nodes for the A31/A31s were added, it was not known that the TCONs could (through either DRCs) select either backend as their input. Thus in the endpoints connecting these components together, the endpoint IDs were set to 0, while in fact they should have been set to 1. Cc: <stable@vger.kernel.org> Fixes: 9a26882a ("ARM: dts: sun6i: Add second display pipeline device nodes") Signed-off-by:
Chen-Yu Tsai <wens@csie.org> Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com>
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- Sep 09, 2017
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Dustin Brown authored
The kernel watchdog is a great debugging tool for finding tasks that consume a disproportionate amount of CPU time in contiguous chunks. One can imagine building a similar watchdog for arbitrary driver threads using save_stack_trace_tsk() and print_stack_trace(). However, this is not viable for dynamically loaded driver modules on ARM platforms because save_stack_trace_tsk() is not exported for those architectures. Export save_stack_trace_tsk() for the ARM architecture to align with x86 and support various debugging use cases such as arbitrary driver thread watchdog timers. Signed-off-by:
Dustin Brown <dustinb@codeaurora.org> Signed-off-by:
Russell King <rmk+kernel@armlinux.org.uk>
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Matthew Wilcox authored
Reuse the existing optimised memset implementation to implement an optimised memset32 and memset64. Link: http://lkml.kernel.org/r/20170720184539.31609-5-willy@infradead.org Signed-off-by:
Matthew Wilcox <mawilcox@microsoft.com> Reviewed-by:
Russell King <rmk+kernel@armlinux.org.uk> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: "James E.J. Bottomley" <jejb@linux.vnet.ibm.com> Cc: "Martin K. Petersen" <martin.petersen@oracle.com> Cc: David Miller <davem@davemloft.net> Cc: Ingo Molnar <mingo@elte.hu> Cc: Ivan Kokshaysky <ink@jurassic.park.msu.ru> Cc: Matt Turner <mattst88@gmail.com> Cc: Michael Ellerman <mpe@ellerman.id.au> Cc: Minchan Kim <minchan@kernel.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Richard Henderson <rth@twiddle.net> Cc: Sam Ravnborg <sam@ravnborg.org> Cc: Sergey Senozhatsky <sergey.senozhatsky@gmail.com> Cc: Thomas Gleixner <tglx@linutronix.de> Signed-off-by:
Andrew Morton <akpm@linux-foundation.org> Signed-off-by:
Linus Torvalds <torvalds@linux-foundation.org>
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- Sep 05, 2017
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James Morse authored
The ARM-ARM has two bits in the ESR/HSR relevant to external aborts. A range of {I,D}FSC values (of which bit 5 is always set) and bit 9 'EA' which provides: > an IMPLEMENTATION DEFINED classification of External Aborts. This bit is in addition to the {I,D}FSC range, and has an implementation defined meaning. KVM should always ignore this bit when handling external aborts from a guest. Remove the ESR_ELx_EA definition and rewrite its helper kvm_vcpu_dabt_isextabt() to check the {I,D}FSC range. This merges kvm_vcpu_dabt_isextabt() and the recently added is_abort_sea() helper. CC: Tyler Baicar <tbaicar@codeaurora.org> Reported-by:
gengdongjiu <gengdj.1984@gmail.com> Signed-off-by:
James Morse <james.morse@arm.com> Signed-off-by:
Marc Zyngier <marc.zyngier@arm.com> Signed-off-by:
Christoffer Dall <cdall@linaro.org>
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- Sep 04, 2017
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Fabio Estevam authored
Commit 2436bdcd ("dma-coherent: remove the DMA_MEMORY_MAP and DMA_MEMORY_IO flags") missed to remove the 'dma' variable causing the following build warning: arch/arm/mach-imx/mach-mx31moboard.c:478:6: warning: unused variable 'dma' [-Wunused-variable] Remove the unused 'dma' variable. Signed-off-by:
Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by:
Christoph Hellwig <hch@lst.de>
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Wolfram Sang authored
include/linux/i2c is not for client devices. Move the header file to a more appropriate location. Signed-off-by:
Wolfram Sang <wsa@the-dreams.de> Acked-by:
Greg Kroah-Hartman <gregkh@linuxfoundation.org> Acked-by:
Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by:
Mark Brown <broonie@kernel.org> Acked-by:
Sebastian Reichel <sebastian.reichel@collabora.co.uk> Acked-by:
Jonathan Cameron <jic23@kernel.org> Acked-by:
Dmitry Torokhov <dmitry.torokhov@gmail.com> Acked-by:
Kishon Vijay Abraham I <kishon@ti.com> Acked-by:
Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Acked-by:
Thierry Reding <thierry.reding@gmail.com> Acked-by:
Tony Lindgren <tony@atomide.com> Acked-by:
Daniel Thompson <daniel.thompson@linaro.org> Acked-by:
Linus Walleij <linus.walleij@linaro.org> Acked-by:
Guenter Roeck <linux@roeck-us.net> Signed-off-by:
Lee Jones <lee.jones@linaro.org>
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- Sep 02, 2017
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Yangbo Lu authored
Sometimes root file system is deployed on SD card. It's proper to build eSDHC driver into kernel. Signed-off-by:
Yangbo Lu <yangbo.lu@nxp.com> Acked-by:
Linus Walleij <linus.walleij@linaro.org> Signed-off-by:
Olof Johansson <olof@lixom.net>
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Quentin Schulz authored
This new clock driver set allows to have a fractional divided clock that would generate a precise clock particularly suitable for audio applications. The main audio pll clock has two children clocks: one that is connected to the PMC, the other that can directly drive a pad. As these two routes have different enable bits and different dividers and divider formulas, they are handled by two different drivers. Each of them could modify the rate of the main audio pll parent. The main audio pll clock can output 620MHz to 700MHz. Signed-off-by:
Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by:
Quentin Schulz <quentin.schulz@free-electrons.com> Acked-by:
Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by:
Stephen Boyd <sboyd@codeaurora.org>
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- Sep 01, 2017
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Christoph Hellwig authored
DMA_MEMORY_IO was never used in the tree, so remove it. That means there is no need for the DMA_MEMORY_MAP flag either now, so remove it as well and change dma_declare_coherent_memory to return a normal errno value. Signed-off-by:
Christoph Hellwig <hch@lst.de> Reviewed-by:
Marek Szyprowski <m.szyprowski@samsung.com>
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Jérôme Glisse authored
Calls to mmu_notifier_invalidate_page() were replaced by calls to mmu_notifier_invalidate_range() and are now bracketed by calls to mmu_notifier_invalidate_range_start()/end() Remove now useless invalidate_page callback. Changed since v1 (Linus Torvalds) - remove now useless kvm_arch_mmu_notifier_invalidate_page() Signed-off-by:
Jérôme Glisse <jglisse@redhat.com> Tested-by:
Mike Galbraith <efault@gmx.de> Tested-by:
Adam Borowski <kilobyte@angband.pl> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Radim Krčmář <rkrcmar@redhat.com> Cc: kvm@vger.kernel.org Cc: Kirill A. Shutemov <kirill.shutemov@linux.intel.com> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Andrea Arcangeli <aarcange@redhat.com> Signed-off-by:
Linus Torvalds <torvalds@linux-foundation.org>
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- Aug 31, 2017
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Minghuan Lian authored
In order to maximize the use of MSI, a PCIe controller will share all MSI controllers. The patch changes msi-parent to refer to all MSI controller dts nodes. Signed-off-by:
Minghuan Lian <Minghuan.Lian@nxp.com> Signed-off-by:
Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by:
Marc Zyngier <marc.zyngier@arm.com>
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Minghuan Lian authored
"1" should be replaced by "l". This is a typo. The patch is to fix it. Signed-off-by:
Minghuan Lian <Minghuan.Lian@nxp.com> Signed-off-by:
Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by:
Marc Zyngier <marc.zyngier@arm.com>
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Marc Zyngier authored
When masking/unmasking a doorbell interrupt, it is necessary to issue an invalidation to the corresponding redistributor. We use the DirectLPI feature by writting directly to the corresponding redistributor. Reviewed-by:
Thomas Gleixner <tglx@linutronix.de> Signed-off-by:
Marc Zyngier <marc.zyngier@arm.com>
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