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  1. Oct 06, 2017
    • Chen-Yu Tsai's avatar
      ARM: dts: sun8i: Add board dts file for Banana Pi M2 Ultra · da7ac948
      Chen-Yu Tsai authored
      
      
      The Banana Pi M2 Ultra is an SBC based on the Allwinner R40 SoC. The
      form factor and position of various connectors, leds and buttons is
      similar to the Banana Pi M1+, Banana Pi M3, and is exactly the same
      as the latest Banana Pi M64.
      
      It features:
      
        - X-Powers AXP221s PMIC connected to i2c0
        - 2 GB DDR3 DRAM
        - 8 GB eMMC
        - micro SD card slot
        - DC power jack
        - HDMI output
        - MIPI DSI connector
        - 2x USB 2.0 hosts
        - 1x USB 2.0 OTG
        - gigabit ethernet with Realtek RTL8211E transceiver
        - WiFi/Bluetooth with AP6212 chip, with external antenna connector
        - SATA and power connectors for native SATA support
        - camera sensor connector
        - consumer IR receiver
        - audio out headphone jack
        - onboard microphone
        - red, green, and blue LEDs
        - debug UART pins
        - Li-Po battery connector
        - Raspberry Pi B+ compatible GPIO header
        - power, reset, and boot control buttons
      
      This patch adds a dts file that enables UART, MMC and PMIC support.
      
      Signed-off-by: default avatarChen-Yu Tsai <wens@csie.org>
      Signed-off-by: default avatarIcenowy Zheng <icenowy@aosc.io>
      Signed-off-by: default avatarMaxime Ripard <maxime.ripard@free-electrons.com>
      da7ac948
    • Chen-Yu Tsai's avatar
      ARM: dts: sun8i: Add basic dtsi file for Allwinner R40 · 195a59ab
      Chen-Yu Tsai authored
      
      
      The Allwinner R40 SoC is marketed as the successor to the A20 SoC.
      The R40 is a smaller chip than the A20, but features the same set
      of programmable pins, with a couple extra pins and some new pin
      functions. The chip features 4 Cortex-A7 cores and a Mali-400 MP2
      GPU. It retains most if not all features from the A20, while adding
      some new features, such as MIPI DSI output, or updating various
      hardware blocks, such as DE 2.0.
      
      Signed-off-by: default avatarChen-Yu Tsai <wens@csie.org>
      Signed-off-by: default avatarIcenowy Zheng <icenowy@aosc.io>
      Signed-off-by: default avatarMaxime Ripard <maxime.ripard@free-electrons.com>
      195a59ab
  2. Sep 27, 2017
  3. Sep 26, 2017
  4. Sep 17, 2017
  5. Sep 16, 2017
    • Linus Torvalds's avatar
      Merge branch '4.14-features' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus · 73184130
      Linus Torvalds authored
      Pull MIPS updates from Ralf Baechle:
       "This is the main pull request for 4.14 for MIPS; below a summary of
        the non-merge commits:
      
        CM:
         - Rename mips_cm_base to mips_gcr_base
         - Specify register size when generating accessors
         - Use BIT/GENMASK for register fields, order & drop shifts
         - Add cluster & block args to mips_cm_lock_other()
      
        CPC:
         - Use common CPS accessor generation macros
         - Use BIT/GENMASK for register fields, order & drop shifts
         - Introduce register modify (set/clear/change) accessors
         - Use change_*, set_* & clear_* where appropriate
         - Add CM/CPC 3.5 register definitions
         - Use GlobalNumber macros rather than magic numbers
         - Have asm/mips-cps.h include CM & CPC headers
         - Cluster support for topology functions
         - Detect CPUs in secondary clusters
      
        CPS:
         - Read GIC_VL_IDENT directly, not via irqchip driver
      
        DMA:
         - Consolidate coherent and non-coherent dma_alloc code
         - Don't use dma_cache_sync to implement fd_cacheflush
      
        FPU emulation / FP assist code:
         - Another series of 14 commits fixing corner cases such as NaN
           propgagation and other special input values.
         - Zero bits 32-63 of the result for a CLASS.D instruction.
         - Enhanced statics via debugfs
         - Do not use bools for arithmetic. GCC 7.1 moans about this.
         - Correct user fault_addr type
      
        Generic MIPS:
         - Enhancement of stack backtraces
         - Cleanup from non-existing options
         - Handle non word sized instructions when examining frame
         - Fix detection and decoding of ADDIUSP instruction
         - Fix decoding of SWSP16 instruction
         - Refactor handling of stack pointer in get_frame_info
         - Remove unreachable code from force_fcr31_sig()
         - Convert to using %pOF instead of full_name
         - Remove the R6000 support.
         - Move FP code from *_switch.S to *_fpu.S
         - Remove unused ST_OFF from r2300_switch.S
         - Allow platform to specify multiple its.S files
         - Add #includes to various files to ensure code builds reliable and
           without warning..
         - Remove __invalidate_kernel_vmap_range
         - Remove plat_timer_setup
         - Declare various variables & functions static
         - Abstract CPU core & VP(E) ID access through accessor functions
         - Store core & VP IDs in GlobalNumber-style variable
         - Unify checks for sibling CPUs
         - Add CPU cluster number accessors
         - Prevent direct use of generic_defconfig
         - Make CONFIG_MIPS_MT_SMP default y
         - Add __ioread64_copy
         - Remove unnecessary inclusions of linux/irqchip/mips-gic.h
      
        GIC:
         - Introduce asm/mips-gic.h with accessor functions
         - Use new GIC accessor functions in mips-gic-timer
         - Remove counter access functions from irq-mips-gic.c
         - Remove gic_read_local_vp_id() from irq-mips-gic.c
         - Simplify shared interrupt pending/mask reads in irq-mips-gic.c
         - Simplify gic_local_irq_domain_map() in irq-mips-gic.c
         - Drop gic_(re)set_mask() functions in irq-mips-gic.c
         - Remove gic_set_polarity(), gic_set_trigger(), gic_set_dual_edge(),
           gic_map_to_pin() and gic_map_to_vpe() from irq-mips-gic.c.
         - Convert remaining shared reg access, local int mask access and
           remaining local reg access to new accessors
         - Move GIC_LOCAL_INT_* to asm/mips-gic.h
         - Remove GIC_CPU_INT* macros from irq-mips-gic.c
         - Move various definitions to the driver
         - Remove gic_get_usm_range()
         - Remove __gic_irq_dispatch() forward declaration
         - Remove gic_init()
         - Use mips_gic_present() in place of gic_present and remove
           gic_present
         - Move gic_get_c0_*_int() to asm/mips-gic.h
         - Remove linux/irqchip/mips-gic.h
         - Inline __gic_init()
         - Inline gic_basic_init()
         - Make pcpu_masks a per-cpu variable
         - Use pcpu_masks to avoid reading GIC_SH_MASK*
         - Clean up mti, reserved-cpu-vectors handling
         - Use cpumask_first_and() in gic_set_affinity()
         - Let the core set struct irq_common_data affinity
      
        microMIPS:
         - Fix microMIPS stack unwinding on big endian systems
      
        MIPS-GIC:
         - SYNC after enabling GIC region
      
        NUMA:
         - Remove the unused parent_node() macro
      
        R6:
         - Constify r2_decoder_tables
         - Add accessor & bit definitions for GlobalNumber
      
        SMP:
         - Constify smp ops
         - Allow boot_secondary SMP op to return errors
      
        VDSO:
         - Drop gic_get_usm_range() usage
         - Avoid use of linux/irqchip/mips-gic.h
      
        Platform changes:
      
        Alchemy:
         - Add devboard machine type to cpuinfo
         - update cpu feature overrides
         - Threaded carddetect irqs for devboards
      
        AR7:
         - allow NULL clock for clk_get_rate
      
        BCM63xx:
         - Fix ENETDMA_6345_MAXBURST_REG offset
         - Allow NULL clock for clk_get_rate
      
        CI20:
         - Enable GPIO and RTC drivers in defconfig
         - Add ethernet and fixed-regulator nodes to DTS
      
        Generic platform:
         - Move Boston and NI 169445 FIT image source to their own files
         - Include asm/bootinfo.h for plat_fdt_relocated()
         - Include asm/time.h for get_c0_*_int()
         - Include asm/bootinfo.h for plat_fdt_relocated()
         - Include asm/time.h for get_c0_*_int()
         - Allow filtering enabled boards by requirements
         - Don't explicitly disable CONFIG_USB_SUPPORT
         - Bump default NR_CPUS to 16
      
        JZ4700:
         - Probe the jz4740-rtc driver from devicetree
      
        Lantiq:
         - Drop check of boot select from the spi-falcon driver.
         - Drop check of boot select from the lantiq-flash MTD driver.
         - Access boot cause register in the watchdog driver through regmap
         - Add device tree binding documentation for the watchdog driver
         - Add docs for the RCU DT bindings.
         - Convert the fpi bus driver to a platform_driver
         - Remove ltq_reset_cause() and ltq_boot_select(
         - Switch to a proper reset driver
         - Switch to a new drivers/soc GPHY driver
         - Add an USB PHY driver for the Lantiq SoCs using the RCU module
         - Use of_platform_default_populate instead of __dt_register_buses
         - Enable MFD_SYSCON to be able to use it for the RCU MFD
         - Replace ltq_boot_select() with dummy implementation.
      
        Loongson 2F:
         - Allow NULL clock for clk_get_rate
      
        Malta:
         - Use new GIC accessor functions
      
        NI 169445:
         - Add support for NI 169445 board.
         - Only include in 32r2el kernels
      
        Octeon:
         - Add support for watchdog of 78XX SOCs.
         - Add support for watchdog of CN68XX SOCs.
         - Expose support for mips32r1, mips32r2 and mips64r1
         - Enable more drivers in config file
         - Add support for accessing the boot vector.
         - Remove old boot vector code from watchdog driver
         - Define watchdog registers for 70xx, 73xx, 78xx, F75xx.
         - Make CSR functions node aware.
         - Allow access to CIU3 IRQ domains.
         - Misc cleanups in the watchdog driver
      
        Omega2+:
         - New board, add support and defconfig
      
        Pistachio:
         - Enable Root FS on NFS in defconfig
      
        Ralink:
         - Add Mediatek MT7628A SoC
         - Allow NULL clock for clk_get_rate
         - Explicitly request exclusive reset control in the pci-mt7620 PCI driver.
      
        SEAD3:
         - Only include in 32 bit kernels by default
      
        VoCore:
         - Add VoCore as a vendor t0 dt-bindings
         - Add defconfig file"
      
      * '4.14-features' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (167 commits)
        MIPS: Refactor handling of stack pointer in get_frame_info
        MIPS: Stacktrace: Fix microMIPS stack unwinding on big endian systems
        MIPS: microMIPS: Fix decoding of swsp16 instruction
        MIPS: microMIPS: Fix decoding of addiusp instruction
        MIPS: microMIPS: Fix detection of addiusp instruction
        MIPS: Handle non word sized instructions when examining frame
        MIPS: ralink: allow NULL clock for clk_get_rate
        MIPS: Loongson 2F: allow NULL clock for clk_get_rate
        MIPS: BCM63XX: allow NULL clock for clk_get_rate
        MIPS: AR7: allow NULL clock for clk_get_rate
        MIPS: BCM63XX: fix ENETDMA_6345_MAXBURST_REG offset
        mips: Save all registers when saving the frame
        MIPS: Add DWARF unwinding to assembly
        MIPS: Make SAVE_SOME more standard
        MIPS: Fix issues in backtraces
        MIPS: jz4780: DTS: Probe the jz4740-rtc driver from devicetree
        MIPS: Ci20: Enable RTC driver
        watchdog: octeon-wdt: Add support for 78XX SOCs.
        watchdog: octeon-wdt: Add support for cn68XX SOCs.
        watchdog: octeon-wdt: File cleaning.
        ...
      73184130