- Nov 02, 2014
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Claudio Leite authored
Add a device tree description of the DLINK DIR665 wireless access point. The support for the 88E6171 switch will be added in a later patch. Signed-off-by: Claudio Leite <leitec@staticky.com> Signed-off-by: Andrew Lunn <andrew@lunn.ch> Link: https://lkml.kernel.org/r/1414793613-11798-2-git-send-email-andrew@lunn.ch Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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Arnaud Ebalard authored
NETGEAR ReadyNAS 2120 supports its four main SATA disks via 2 Marvell 88SE9170 SATA controllers connected on the PCIe bus of the the SoC. The two eSATA ports available at the rear of the device are handled by the native SATA controller of the Armada XP SoC powering the NAS. This patch enables the SoC SATA controller in the .dts file to make those two rear ports available. Signed-off-by: Arnaud Ebalard <arno@natisbad.org> Acked-by: Andrew Lunn <andrew@lunn.ch> Link: https://lkml.kernel.org/r/f3876c7a9ef11eb758b9df18c671ee740b8be614.1414250947.git.arno@natisbad.org Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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Ezequiel Garcia authored
Now that the timer and watchdog drivers support the Armada 375 usage of the reference clock, we can enable it in the devicetree. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Reviewed-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Link: https://lkml.kernel.org/r/1414248522-16055-5-git-send-email-ezequiel.garcia@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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Arnaud Ebalard authored
On NETGEAR ReadyNAS 102, the two disks are connected to the external Marvell 88SE9170 SATA Controller connected to the PCIe bus. The rear eSATA port is connected to the native Armada 370 SATA controller. This patch updates the comments in .dts file wrt SATA interfaces and reduces the number of ports for native Armada 370 interface from 2 to 1. Signed-off-by: Arnaud Ebalard <arno@natisbad.org> Acked-by: Andrew Lunn <andrew@lunn.ch> Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Link: https://lkml.kernel.org/r/4af680f9a68281755e31df2491f0590046138230.1414185031.git.arno@natisbad.org Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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Arnaud Ebalard authored
When writing initial .dts file for NETGEAR ReadyNAS 102, I put the wrong color for backup and SATA leds (green instead of blue for all three). Reported-by: Johan Kristell <johan.kristell@gmail.com> Signed-off-by: Arnaud Ebalard <arno@natisbad.org> Acked-by: Andrew Lunn <andrew@lunn.ch> Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Link: https://lkml.kernel.org/r/4eb4049d934a3a8fe9f7235dafb6842422792566.1414185031.git.arno@natisbad.org Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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Gregory CLEMENT authored
The L2 cache controller on the Armada 370 and Armada XP SoCs is a unified cache. Moreover, the Aurora cache controller is compatible with the L2x0 cache controller: the "cache-unified" property is required by its binding. This patch fixes the Aurora L2 cache node for the Armada 370 and Armada XP SoCs by adding this property. Reported-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Link: https://lkml.kernel.org/r/1412588276-4514-1-git-send-email-gregory.clement@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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- Oct 19, 2014
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David S. Miller authored
This breaks the stack end corruption detection facility. What that facility does it write a magic value to "end_of_stack()" and checking to see if it gets overwritten. "end_of_stack()" is "task_thread_info(p) + 1", which for sparc64 is the beginning of the FPU register save area. So once the user uses the FPU, the magic value is overwritten and the debug checks trigger. Fix this by making the size explicit. Due to the size we use for the fpsaved[], gsr[], and xfsr[] arrays we are limited to 7 levels of FPU state saves. So each FPU register set is 256 bytes, allocate 256 * 7 for the fpregs area. Reported-by: Meelis Roos <mroos@linux.ee> Signed-off-by: David S. Miller <davem@davemloft.net>
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David S. Miller authored
Every path that ends up at do_sparc64_fault() must install a valid FAULT_CODE_* bitmask in the per-thread fault code byte. Two paths leading to the label winfix_trampoline (which expects the FAULT_CODE_* mask in register %g4) were not doing so: 1) For pre-hypervisor TLB protection violation traps, if we took the 'winfix_trampoline' path we wouldn't have %g4 initialized with the FAULT_CODE_* value yet. Resulting in using the TLB_TAG_ACCESS register address value instead. 2) In the TSB miss path, when we notice that we are going to use a hugepage mapping, but we haven't allocated the hugepage TSB yet, we still have to take the window fixup case into consideration and in that particular path we leave %g4 not setup properly. Errors on this sort were largely invisible previously, but after commit 4ccb9272 ("sparc64: sun4v TLB error power off events") we now have a fault_code mask bit (FAULT_CODE_BAD_RA) that triggers due to this bug. FAULT_CODE_BAD_RA triggers because this bit is set in TLB_TAG_ACCESS (see #1 above) and thus we get seemingly random bus errors triggered for user processes. Fixes: 4ccb9272 ("sparc64: sun4v TLB error power off events") Reported-by: Meelis Roos <mroos@linux.ee> Signed-off-by: David S. Miller <davem@davemloft.net>
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Andy Lutomirski authored
CR4 isn't constant; at least the TSD and PCE bits can vary. TBH, treating CR0 and CR3 as constant scares me a bit, too, but it looks like it's correct. This adds a branch and a read from cr4 to each vm entry. Because it is extremely likely that consecutive entries into the same vcpu will have the same host cr4 value, this fixes up the vmcs instead of restoring cr4 after the fact. A subsequent patch will add a kernel-wide cr4 shadow, reducing the overhead in the common case to just two memory reads and a branch. Signed-off-by: Andy Lutomirski <luto@amacapital.net> Acked-by: Paolo Bonzini <pbonzini@redhat.com> Cc: stable@vger.kernel.org Cc: Petr Matousek <pmatouse@redhat.com> Cc: Gleb Natapov <gleb@kernel.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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- Oct 17, 2014
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Anton Blanchard authored
Commit e7dbfe34 ("kprobes/x86: Move ftrace-based kprobe code into kprobes-ftrace.c") switched from using ARCH_SUPPORTS_KPROBES_ON_FTRACE to CONFIG_KPROBES_ON_FTRACE but missed removing the define. Signed-off-by: Anton Blanchard <anton@samba.org> Cc: masami.hiramatsu.pt@hitachi.com Cc: ananth@in.ibm.com Cc: a.p.zijlstra@chello.nl Cc: fweisbec@gmail.com Cc: rostedt@goodmis.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Ingo Molnar <mingo@kernel.org>
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Sjoerd Simons authored
Explicitly set the dr_mode for the second dwc3 controller on the Arndale Octa board to host mode. This is required to ensure the controller is initialized in the right mode if the kernel is build with USB gadget support. Reported-By: Andreas Faerber <afaerber@suse.de> Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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Sjoerd Simons authored
In case the optional dr_mode property isn't set in the dwc3 nodes the the controller will go into OTG mode if both USB host and USB gadget functionality are enabled in the kernel configuration. Unfortunately this results in USB not working on exynos5420-peach-pit and exynos5800-peach-pi with such a kernel configuration unless manually change the mode. To resolve that explicitly configure the dual role mode as host. Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Reviewed-by: Andreas Faerber <afaerber@suse.de> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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- Oct 16, 2014
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Christoffer Dall authored
The EIRSR and ELRSR registers are 32-bit registers on GICv2, and we store these as an array of two such registers on the vgic vcpu struct. However, we access them as a single 64-bit value or as a bitmap pointer in the generic vgic code, which breaks BE support. Instead, store them as u64 values on the vgic structure and do the word-swapping in the assembly code, which already handles the byte order for BE systems. Tested-by: Victor Kamensky <victor.kamensky@linaro.org> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
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Mike Rapoport authored
CM-QS600 is a APQ8064 based computer on module. The details are available at http://compulab.co.il/products/computer-on-modules/cm-qs600/ Signed-off-by: Mike Rapoport <mike.rapoport@gmail.com> Acked-by: Igor Grinberg <grinberg@compulab.co.il> Signed-off-by: Kumar Gala <galak@codeaurora.org>
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Tim Bird authored
This DTS has support for the Sony Xperia Z1 phone (codenamed Honami). This first version of the DTS supports just a serial console. Signed-off-by: Tim Bird <tim.bird@sonymobile.com> Tested-by: Kevin Hilman <khilman@linaro.org> Signed-off-by: Kumar Gala <galak@codeaurora.org>
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Kumar Gala authored
Add SATA PHY and SATA AHCI controller nodes to device tree to enable generic ahci support on the IPQ8064/AP148 board. Signed-off-by: Kumar Gala <galak@codeaurora.org>
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Michael Ellerman authored
Commit 0b0b0893 "of/pci: Fix the conversion of IO ranges into IO resources" changed the behaviour of of_pci_range_to_resource(). Previously it simply populated the resource based on the arguments. Now it calls pci_register_io_range() and pci_address_to_pio(). These both have two implementations depending on whether PCI_IOBASE is defined, which it is not for powerpc. Further complicating matters, both routines are weak, and powerpc implements it's own version of one - pci_address_to_pio(). However powerpc's implementation depends on other initialisations which are done later in boot. The end result is incorrectly initialised IO space. Often we can get away with that, because we don't make much use of IO space. However virtio requires it, so we see eg: pci_bus 0000:00: root bus resource [io 0xffff] (bus address [0xffffffffffffffff-0xffffffffffffffff]) PCI: Cannot allocate resource region 0 of device 0000:00:01.0, will remap virtio-pci 0000:00:01.0: can't enable device: BAR 0 [io size 0x0020] not assigned The simplest fix for now is to just stop using of_pci_range_to_resource(), and open-code the original implementation, that's all we want it to do. Fixes: 0b0b0893 ("of/pci: Fix the conversion of IO ranges into IO resources") Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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- Oct 15, 2014
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Steve Capper authored
Commit: b8865767 ARM: KVM: user_mem_abort: support stage 2 MMIO page mapping introduced some code in user_mem_abort that failed to compile if STRICT_MM_TYPECHECKS was enabled. This patch fixes up the failing comparison. Signed-off-by: Steve Capper <steve.capper@linaro.org> Reviewed-by: Kim Phillips <kim.phillips@linaro.org> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
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Olof Johansson authored
Commit 97a13e52 ('net: phy: mdio-sun4i: don't select REGULATOR') removed the select of REGULATOR, which means that it now has to be explicitly enabled in the defconfig or things won't work very well. In particular, this fixes a problem with SD/MMC not probing on my A31-based board. Cc: Beniamino Galvani <b.galvani@gmail.com> Signed-off-by: Olof Johansson <olof@lixom.net>
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David S. Miller authored
The AES loops in arch/sparc/crypto/aes_glue.c use a scheme where the key material is preloaded into the FPU registers, and then we loop over and over doing the crypt operation, reusing those pre-cooked key registers. There are intervening blkcipher*() calls between the crypt operation calls. And those might perform memcpy() and thus also try to use the FPU. The sparc64 kernel FPU usage mechanism is designed to allow such recursive uses, but with a catch. There has to be a trap between the two FPU using threads of control. The mechanism works by, when the FPU is already in use by the kernel, allocating a slot for FPU saving at trap time. Then if, within the trap handler, we try to use the FPU registers, the pre-trap FPU register state is saved into the slot. Then at trap return time we notice this and restore the pre-trap FPU state. Over the long term there are various more involved ways we can make this work, but for a quick fix let's take advantage of the fact that the situation where this happens is very limited. All sparc64 chips that support the crypto instructiosn also are using the Niagara4 memcpy routine, and that routine only uses the FPU for large copies where we can't get the source aligned properly to a multiple of 8 bytes. We look to see if the FPU is already in use in this context, and if so we use the non-large copy path which only uses integer registers. Furthermore, we also limit this special logic to when we are doing kernel copy, rather than a user copy. Signed-off-by: David S. Miller <davem@davemloft.net>
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Iyappan Subramanian authored
Signed-off-by: Iyappan Subramanian <isubramanian@apm.com> Signed-off-by: Keyur Chudgar <kchudgar@apm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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Alexei Starovoitov authored
1. JIT compiler using multi-pass approach to converge to final image size, since x86 instructions are variable length. It starts with large gaps between instructions (so some jumps may use imm32 instead of imm8) and iterates until total program size is the same as in previous pass. This algorithm works only if program size is strictly decreasing. Programs that use LD_ABS insn need additional code in prologue, but it was not emitted during 1st pass, so there was a chance that 2nd pass would adjust imm32->imm8 jump offsets to the same number of bytes as increase in prologue, which may cause algorithm to erroneously decide that size converged. Fix it by always emitting largest prologue in the first pass which is detected by oldproglen==0 check. Also change error check condition 'proglen != oldproglen' to fail gracefully. 2. while staring at the code realized that 64-byte buffer may not be enough when 1st insn is large, so increase it to 128 to avoid buffer overflow (theoretical maximum size of prologue+div is 109) and add runtime check. Fixes: 62258278 ("net: filter: x86: internal BPF JIT") Reported-by: Darrick J. Wong <darrick.wong@oracle.com> Signed-off-by: Alexei Starovoitov <ast@plumgrid.com> Tested-by: Darrick J. Wong <darrick.wong@oracle.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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- Oct 14, 2014
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Christoffer Dall authored
When creating or moving a memslot, make sure the IPA space is within the addressable range of the guest. Otherwise, user space can create too large a memslot and KVM would try to access potentially unallocated page table entries when inserting entries in the Stage-2 page tables. Acked-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
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Christoffer Dall authored
This patch adds the necessary support for all host kernel PGSIZE and VA_SPACE configuration options for both EL2 and the Stage-2 page tables. However, for 40bit and 42bit PARange systems, the architecture mandates that VTCR_EL2.SL0 is maximum 1, resulting in fewer levels of stage-2 pagge tables than levels of host kernel page tables. At the same time, systems with a PARange > 42bit, we limit the IPA range by always setting VTCR_EL2.T0SZ to 24. To solve the situation with different levels of page tables for Stage-2 translation than the host kernel page tables, we allocate a dummy PGD with pointers to our actual inital level Stage-2 page table, in order for us to reuse the kernel pgtable manipulation primitives. Reproducing all these in KVM does not look pretty and unnecessarily complicates the 32-bit side. Systems with a PARange < 40bits are not yet supported. [ I have reworked this patch from its original form submitted by Jungseok to take the architecture constraints into consideration. There were too many changes from the original patch for me to preserve the authorship. Thanks to Catalin Marinas for his help in figuring out a good solution to this challenge. I have also fixed various bugs and missing error code handling from the original patch. - Christoffer ] Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Jungseok Lee <jungseoklee85@gmail.com> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
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Geert Uytterhoeven authored
They're already provided by <asm/sections.h>. Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Cc: "Luck, Tony" <tony.luck@intel.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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Geert Uytterhoeven authored
Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Acked-by: David Howells <dhowells@redhat.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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Ulrich Obergfell authored
Use watchdog_enable_hardlockup_detector() to set hard lockup detection's default value to false. It's risky to run this detection in a guest, as false positives are easy to trigger, especially if the host is overcommitted. Signed-off-by: Ulrich Obergfell <uobergfe@redhat.com> Signed-off-by: Andrew Jones <drjones@redhat.com> Signed-off-by: Don Zickus <dzickus@redhat.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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Xishi Qiu authored
If all the nodes are marked hotpluggable, alloc node data will fail. Because __next_mem_range_rev() will skip the hotpluggable memory regions. numa_clear_kernel_node_hotplug() is called after alloc node data. numa_init() ... ret = init_func(); // this will mark hotpluggable flag from SRAT ... memblock_set_bottom_up(false); ... ret = numa_register_memblks(&numa_meminfo); // this will alloc node data(pglist_data) ... numa_clear_kernel_node_hotplug(); // in case all the nodes are hotpluggable ... numa_register_memblks() setup_node_data() memblock_find_in_range_node() __memblock_find_range_top_down() for_each_mem_range_rev() __next_mem_range_rev() This patch moves numa_clear_kernel_node_hotplug() into numa_register_memblks(), clear kernel node hotpluggable flag before alloc node data, then alloc node data won't fail even all the nodes are hotpluggable. [akpm@linux-foundation.org: coding-style fixes] Signed-off-by: Xishi Qiu <qiuxishi@huawei.com> Cc: Dave Jones <davej@redhat.com> Cc: Tang Chen <tangchen@cn.fujitsu.com> Cc: Gu Zheng <guz.fnst@cn.fujitsu.com> Cc: Ingo Molnar <mingo@elte.hu> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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Rasmus Villemoes authored
The kernel used to contain two functions for length-delimited, case-insensitive string comparison, strnicmp with correct semantics and a slightly buggy strncasecmp. The latter is the POSIX name, so strnicmp was renamed to strncasecmp, and strnicmp made into a wrapper for the new strncasecmp to avoid breaking existing users. To allow the compat wrapper strnicmp to be removed at some point in the future, and to avoid the extra indirection cost, do s/strnicmp/strncasecmp/g. Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk> Cc: Russell King <linux@arm.linux.org.uk> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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Andrew Morton authored
x86_64 allnoconfig: arch/x86/kernel/cpu/common.c:968: warning: 'syscall32_cpu_init' defined but not used Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Ingo Molnar <mingo@elte.hu> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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Mike Travis authored
Use the optimized ioresource lookup, "region_is_ram", for the ioremap function. If the region is not found, it falls back to the "page_is_ram" function. If it is found and it is RAM, then the usual warning message is issued, and the ioremap operation is aborted. Otherwise, the ioremap operation continues. Signed-off-by: Mike Travis <travis@sgi.com> Acked-by: Alex Thorlton <athorlton@sgi.com> Reviewed-by: Cliff Wickman <cpw@sgi.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Mark Salter <msalter@redhat.com> Cc: Dave Young <dyoung@redhat.com> Cc: Rik van Riel <riel@redhat.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Mel Gorman <mgorman@suse.de> Cc: Ingo Molnar <mingo@elte.hu> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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Vivek Goyal authored
David Howells brought to my attention the mails generated by kbuild test bot and following sparse warnings were present. This patch fixes these warnings. arch/x86/kernel/kexec-bzimage64.c:270:5: warning: symbol 'bzImage64_probe' was not declared. Should it be static? arch/x86/kernel/kexec-bzimage64.c:328:6: warning: symbol 'bzImage64_load' was not declared. Should it be static? arch/x86/kernel/kexec-bzimage64.c:517:5: warning: symbol 'bzImage64_cleanup' was not declared. Should it be static? arch/x86/kernel/kexec-bzimage64.c:531:5: warning: symbol 'bzImage64_verify_sig' was not declared. Should it be static? arch/x86/kernel/kexec-bzimage64.c:546:23: warning: symbol 'kexec_bzImage64_ops' was not declared. Should it be static? Signed-off-by: Vivek Goyal <vgoyal@redhat.com> Reported-by: David Howells <dhowells@redhat.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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Baoquan He authored
Add a check if crashk_res_low exists just like GART region does. If crashk_res_low doesn't exist, calling exclude_mem_range is unnecessary. Meanwhile, since crashk_res_low has been initialized at definition, it's safe just use "if (crashk_low_res.end)" to check if it's exist. And this can make it consistent with other places of check. Signed-off-by: Baoquan He <bhe@redhat.com> Acked-by: Vivek Goyal <vgoyal@redhat.com> Cc: Eric W. Biederman <ebiederm@xmission.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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Baoquan He authored
Make the Makefile of kexec purgatory be consistent with others in linux src tree, and make it look generic and simple. Signed-off-by: Baoquan He <bhe@redhat.com> Cc: Vivek Goyal <vgoyal@redhat.com> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Ingo Molnar <mingo@elte.hu> Cc: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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Chanwoo Choi authored
Fix wrong compatible string of Exynos3250 RTC (Real-Time Clock) dt node. The RTC of Exynos3250 must need additional source clock (XrtcXTI). Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> Acked-by: Kyungmin Park <kyungmin.park@samsung.com> Cc: Alessandro Zummo <a.zummo@towertech.it> Cc: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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Himangi Saraogi authored
alloc_bootmem and related functions never return NULL. Thus a NULL test or memset after calls to these functions is unnecessary. The following Coccinelle semantic patch was used for making the change: @@ expression E; statement S; @@ E = \(alloc_bootmem\|alloc_bootmem_low\|alloc_bootmem_pages\|alloc_bootmem_low_pages\)(...) ... when != E - if (E == NULL) S Signed-off-by: Himangi Saraogi <himangi774@gmail.com> Acked-by: Julia Lawall <julia.lawall@lip6.fr> Signed-off-by: Richard Weinberger <richard@nod.at>
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Daniel Walter authored
Add stacktrace support for User Mode Linux Signed-off-by: Daniel Walter <dwalter@google.com> Signed-off-by: Richard Weinberger <richard@nod.at>
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Thorsten Knabe authored
Starting with Linux 3.12 processes get stuck in D state forever in UserModeLinux under sync heavy workloads. This bug was introduced by commit 805f11a0 (um: ubd: Add REQ_FLUSH suppport). Fix bug by adding a check if FLUSH request was successfully submitted to the I/O thread and keeping the FLUSH request on the request queue on submission failures. Fixes: 805f11a0 (um: ubd: Add REQ_FLUSH suppport) Signed-off-by: Thorsten Knabe <linux@thorsten-knabe.de> Cc: stable@kernel.org # >= 3.12 Signed-off-by: Richard Weinberger <richard@nod.at>
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- Oct 13, 2014
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Honggang Li authored
1) uml kernel bootmem managed through bootmem_data->node_bootmem_map, not the struct page array, so the array is unnecessary. 2) the bootmem struct page array has been pointed by a *local* pointer, struct page *map, in init_maps function. The array can be accessed only in init_maps's scope. As a result, uml kernel wastes about 1% of total memory. Signed-off-by: Honggang Li <enjoymindful@gmail.com> Signed-off-by: Richard Weinberger <richard@nod.at>
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Honggang Li authored
arch/x86/um/checksum_32.S had been copy & paste from x86. When build x86 uml, csum_partial_copy_generic_i386 mess up the exception table. In fact, exception table dose not work in uml kernel. And csum_partial_copy_generic_i386 never been called. So, delete it. Signed-off-by: Honggang Li <enjoymindful@gmail.com> Signed-off-by: Richard Weinberger <richard@nod.at>
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