Merge tag 'socfpga_dts_for_v4.10_part_3' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into next/dt

Merge "SoCFPGA DTS update for v4.10, part 3" from Dinh Nguyen:

- Fine tune L2 cache configuration

* tag 'socfpga_dts_for_v4.10_part_3' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
  ARM: dts: socfpga: fine-tune L2 cache configuration

Merge tag 'renesas-dt2-for-v4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt

Pull "Second Round of Renesas ARM Based SoC DT Updates for v4.10" from Simon Horman:

Enhancements:
* Add device nodes for PRR
* Add r8a7745 SoC and sk-rzg1e board
* Add r8a7743 SoC and sk-rzg1m board
* Enable SDR-104 and I2C demuxer on alt, koelsch and lager boards

Corrections:
* Use SYSC "always-on" PM Domain for sound on r8a7794 SoC
* Correct hsusb parent clock on r8a7794 SoC
* Correct PFC names for DU on alt board

* tag 'renesas-dt2-for-v4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (33 commits)
  ARM: dts: r8a7794: Add device node for PRR
  ARM: dts: r8a7793: Add device node for PRR
  ARM: dts: r8a7792: Add device node for PRR
  ARM: dts: r8a7791: Add device node for PRR
  ARM: dts: r8a7790: Add device node for PRR
  ARM: dts: r8a7779: Add device node for PRR
  ARM: dts: r8a73a4: Add device node for PRR
  ARM: dts: sk-rzg1e: add Ether support
  ARM: dts: sk-rzg1e: initial device tree
  ARM: dts: r8a7745: add IRQC support
  ARM: dts: r8a7745: add Ether support
  ARM: dts: r8a7745: add [H]SCIF{|A|B} support
  ARM: dts: r8a7745: add SYS-DMAC support
  ARM: dts: r8a7745: initial SoC device tree
  ARM: dts: sk-rzg1m: add Ether support
  ARM: dts: sk-rzg1m: initial device tree
  ARM: dts: r8a7743: add IRQC support
  ARM: dts: r8a7743: add Ether support
  ARM: dts: r8a7743: add [H]SCIF{A|B} support
  ARM: dts: r8a7743: add SYS-DMAC support
  ...

Merge tag 'rzg-clock-defs-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into next/dt

Pull "Renesas RZ/G1M and RZ/G1E CPG Core Clock Definitions" from Geert Uytterhoeven:

Shared by clock drivers, and DTS files.

* tag 'rzg-clock-defs-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers:
  clk: renesas: Add r8a7745 CPG Core Clock Definitions
  clk: renesas: Add r8a7743 CPG Core Clock Definitions

Merge tag 'davinci-for-v4.10/dt-3' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/dt

Pull "DaVinci DT updates for v4.10 (part 3)" from Sekhar Nori:

Some fixes for device-tree patches already queued.
- Fix SD card detect polarity
- Prevent Ethernet from picking a random mac address
- Fix error messages on platforms which dont use
  bus master and emif priority settings.

* tag 'davinci-for-v4.10/dt-3' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
  ARM: dts: da850: enable memctrl and mstpri nodes per board
  ARM: dts: da850-lcdk: Add ethernet0 alias to DT
  ARM: dts: da850-lcdk: fix mmc card detect polarity

Merge tag 'davinci-for-v4.10/dt-2' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/dt

Pull "DaVinci DT updates for v4.10 (part 2)" from Sekhar Nori:

Adds device tree nodes enabling DDR controller
and bus master priority settings needed for
stable LCDC operation on DA850.

Also adds support for MUSB device on DA850
providing USB OTG support.

* tag 'davinci-for-v4.10/dt-2' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
  ARM: dts: da850-lcdk: Enable the usb otg device node
  ARM: dts: da850: Add the usb otg device node
  ARM: dts: da850: add the mstpri and ddrctl nodes

Currently the memory controller and master priorities drivers are
enabled in da850.dtsi. For boards for which there are no settings
defined, this makes these drivers emit error messages.

Disable the nodes in da850.dtsi and only enable them for da850-lcdk -
the only board that currently needs them.

Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>

In order to avoid Linux generating a random mac address on every boot,
add an ethernet0 alias that will allow u-boot to patch the dtb with
the MAC address programmed into the EEPROM.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>

Merge tag 'sunxi-dt-for-4.10-bis' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into next/dt

Pull "Allwinner DT additions for 4.10, bis" from Maxime Ripard:

The usual bunch of DT additions, but most notably:
  - A31 DRM driver
  - A31 audio codec
  - WiFi for the A80-Based boards and the CHIP
  - Support for the NextThing Co CHIP Pro (the first board with NAND
    enabled)
  - New board: NanoPi M1

* tag 'sunxi-dt-for-4.10-bis' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux: (41 commits)
  ARM: dts: sun6i: hummingbird-a31: Enable display output through VGA bridge
  ARM: dts: sun5i: Add touchscreen node to reference-design-tablet.dtsi
  ARM: sunxi: Add the missing clocks to the pinctrl nodes
  ARM: dts: sun7i: bananapi-m1-plus: Enable USB OTG
  ARM: dts: sun7i: bananapi-m1-plus: Add PMIC regulators
  ARM: dts: sun7i: bananapi-m1-plus: Enable USB PHY for USB host support
  ARM: sun8i: sina33: Enable USB gadget
  ARM: dts: sun8i: reference-design-tablet: ldo_io1 is vcc-touchscreen
  ARM: dts: sun8i: replace enable-sdio-wakeup with wakeup-source for BananaPi M1+
  ARM: gr8: evb: Add i2s codec
  ARM: dts: sun6i: sina31s: Enable internal audio codec
  ARM: dts: sun6i: hummingbird: Enable internal audio codec
  ARM: dts: sun6i: Add audio codec device node
  ARM: gr8: evb: Enable SPDIF
  ARM: dts: sun8i: Add SPI controller node in H3
  ARM: dts: sun8i: Add SPI pinctrl node in H3
  ARM: dts: sun8i: Add dts file for NanoPi M1 SBC
  ARM: dts: sun8i: Use the common file in NanoPi NEO SBC
  ARM: dts: sun8i: Add common dtsi file for NanoPi SBCs
  ARM: dts: sun9i: cubieboard4: Enable AP6330 WiFi
  ...

Pull "mvebu dt for 4.10 (part 1)" from Gregory CLEMENT:

Add missing pinmux declaration for netgear NASes
Fix i2c compatible string for netgear NASes
Fix on a wrong comment about PLL frequency
Fix spelling mistake of the manufacturer's name of the Topkick
Add dt support for the orion5x ls-chl Linkstation device
First step of fixing DTC warning for Armada 370, 375 and XP

* tag 'mvebu-dt-4.10-1' of git://git.infradead.org/linux-mvebu: (30 commits)
  ARM: dts: armada-375: Fixup ethernet child DT warning
  ARM: dts: armada-375: Fixup memory DT warning
  ARM: dts: armada-375: Remove skeleton.dtsi
  ARM: dts: armada-375: Fixup pinctrl DT warnings
  ARM: dts: armada-375: Fixup pcie DT warnings
  ARM: dts: armada-375: Fixup mdio DT warning
  ARM: dts: armada-375: Use the node labels
  ARM: dts: armada-375: Add node labels
  ARM: dts: armada-370-xp: Fixup regulator DT warning
  ARM: dts: armada-370-xp: Remove button address and fixup names
  ARM: dts: armada-370-xp: Remove address from dsa unit name
  ARM: dts: armada-370-xp: Fixup memory DT warning
  ARM: dts: armada-370-xp: Fixup l2-cache DT warning
  ARM: dts: armada-370-xp: Remove skeleton.dtsi
  ARM: dts: armada-370: Fixup pcie DT warnings
  ARM: dts: armada-xp: Fixup pcie DT warnings
  ARM: dts: armada-370-xp: Fixup mdio DT warning
  ARM: dts: armada-370-xp: Use the node labels
  ARM: dts: armada-370-xp: add node labels
  ARM: dts: armada-370-xp: move the cpurst node in the common file
  ...

Merge tag 'qcom-dts-for-4.10-1' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/dt

Pull "Qualcomm Device Tree Changes for v4.10 - v2" from Andy Gross:

* Add EBI2 support to MSM8660
* Add SMSC ethernet support to APQ8060
* Add support for display, pstore, iommu, and hdmi to APQ8064
* Add SDHCI node to MSM8974 Hammerhead
* Add WP8548 MangOH board support (MDM9615)

* tag 'qcom-dts-for-4.10-1' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux:
  ARM: dts: add SMSC ethernet on the APQ8060 Dragonboard
  ARM: dts: add EBI2 to the Qualcomm MSM8660 DTSI
  arm: dts: qcom: apq8064-nexus7: Add pstore support to nexus7
  arm: dts: qcom: apq8064-nexus7: Add DSI and panel nodes
  arm: dts: qcom: apq8064: Add dsi, gpu and iommu nodes
  arm: dts: qcom: apq8064-ifc6410: Add HDMI support
  arm: dts: qcom: apq8064: Add display DT nodes
  ARM: dts: qcom: msm8974-hammerhead: Add sdhci1 node
  dt-bindings: arm: Add Sierra Wireless modules bindings
  ARM: dts: Add WP8548 based MangOH Green board DTS
  ARM: dts: Add Sierra Wireless WP8548 dtsi
  dt-bindings: qcom: Add MDM9615 bindings
  ARM: dts: Add MDM9615 dtsi

Pull "This device-tree pxa update brings" from Robert Jarzmik:

 - pxa25x support
 - cpu operating points in preparation for cpufreq-dt
 - small fixes

* tag 'pxa-dt-4.10' of https://github.com/rjarzmik/linux:
  ARM: dts: pxa: add pxa27x cpu operating points
  ARM: dts: pxa: add pxa25x cpu operating points
  ARM: dts: pxa: fix gpio0 and gpio1 interrupts
  ARM: dts: pxa: fix no. of gpio cells in the pxa gpio binding documentation
  ARM: dts: pxa: add pxa25x .dtsi file

Add PCIe support to the ARTPEC-6 SoC. This uses the existing
pcie-artpec6 driver.
So, all that is needed is device tree entries in the DTS.

Signed-off-by: Niklas Cassel <niklas.cassel@axis.com>
Signed-off-by: Jesper Nilsson <jespern@axis.com>

Pull "ARM: OXNAS SoC DT updates for 4.10" from Neil Armstrong:

- Add DTSI for Oxford Semiconductor OX820
- Add DTS for Cloud Engines PogoPlug v3 board
- Fix MAINTAINERS Oxnas entry for dts files
from http://lkml.kernel.org/r/20161102141850.25164-1-narmstrong@baylibre.com

* tag 'oxnas-arm-soc-dt-for-4.10' of https://github.com/OXNAS/linux:
  MAINTAINERS: oxnas: Add new files definitions
  ARM: dts: Add support for OX820 and Pogoplug V3

Add a device node for the Product Register, which provides SoC product
and revision information.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Add a device node for the Product Register, which provides SoC product
and revision information.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Add a device node for the Product Register, which provides SoC product
and revision information.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Add a device node for the Product Register, which provides SoC product
and revision information.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Add a device node for the Product Register, which provides SoC product
and revision information.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Add a device node for the Product Register, which provides SoC product
and revision information.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Add a device node for the Product Register, which provides SoC product
and revision information.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Define the SK-RZG1E board dependent part of the Ether device node.
Enable DHCP and NFS root  for the kernel booting.

Based on the original (and large) patch by Dmitry Shifrin
<dmitry.shifrin@cogentembedded.com>.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Add the initial  device tree for the R8A7745 SoC based SK-RZG1E board.
The board has 1  debug  serial  port (SCIF2); include support for it,
so that the serial console can  work.

Based on the original (and large) patch by Dmitry Shifrin
<dmitry.shifrin@cogentembedded.com>.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Describe the IRQC interrupt controller in the R8A7745 device tree.

Based on the original (and large) patch by Dmitry Shifrin
<dmitry.shifrin@cogentembedded.com>.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Define the generic R8A7745 part of the Ether device node.

Based on the original (and large) patch by Dmitry Shifrin
<dmitry.shifrin@cogentembedded.com>.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Describe [H]SCIF{|A|B} ports in the R8A7745 device tree.

Based on the original (and large) patch by Dmitry Shifrin
<dmitry.shifrin@cogentembedded.com>.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
[simon: consistently use tabs for indentation]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Describe SYS-DMAC0/1 in the R8A7745 device tree.

Based on the original (and large) patch by Dmitry Shifrin
<dmitry.shifrin@cogentembedded.com>.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

The  initial R8A7745 SoC device tree including CPU0, GIC, timer, SYSC, RST,
CPG, and the required clock descriptions.

Based on the original (and large) patch by Dmitry Shifrin
<dmitry.shifrin@cogentembedded.com>.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Define the SK-RZG1M board dependent part of the Ether device node.
Enable DHCP and NFS root  for the kernel booting.

Based on the original (and large) patch by Dmitry Shifrin
<dmitry.shifrin@cogentembedded.com>.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Add the initial device  tree for the R8A7743 SoC based SK-RZG1M board.
The board has one debug serial port (SCIF0); include support for it, so
that  the serial  console  can work.

Based on the original (and large) patch by Dmitry Shifrin
<dmitry.shifrin@cogentembedded.com>.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Describe the IRQC interrupt controller in the R8A7743 device tree.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Define the generic R8A7743 part of the Ether device node.

Based on the original (and large) patch by Dmitry Shifrin
<dmitry.shifrin@cogentembedded.com>.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Describe [H]SCIF{|A|B} ports in the R8A7743 device tree.

Based on the original (and large) patch by Dmitry Shifrin
<dmitry.shifrin@cogentembedded.com>.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
[simon: consistently use tabs for indentation]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

Describe SYS-DMAC0/1 in the R8A7743 device tree.

Based on the original (and large) patch by Dmitry Shifrin
<dmitry.shifrin@cogentembedded.com>.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

The  initial R8A7743 SoC device tree including CPU0, GIC, timer, SYSC, RST,
CPG, and the required clock descriptions.

Based on the original (and large) patch by Dmitry Shifrin
<dmitry.shifrin@cogentembedded.com>.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

And the sd-uhs-sdr104 property to SDHI0.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>

And the sd-uhs-sdr104 property to SDHI0.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>

Add the sd-uhs-sdr104 property to SDHI0.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>

Make it possible to fallback to GPIO for I2C4 on the EXIO-B connector.

This is based on reference work for the I2C0 core of the lager/r8a7790
by Wolfram Sang.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
[wsa: rebased and fixed aliases]
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>

Make it possible to fallback to GPIO for I2C1 on the EXIO-C connector.

This is based on reference work for the I2C0 core of the lager/r8a7790
by Wolfram Sang.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
[wsa: rebased and fixed aliases]
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>

Make it possible to select which I2C1 IP core you want to run on the
EXIO-A connector.

This is based on reference work for the I2C0 core of the lager board
by Wolfram Sang.

Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
[wsa: rebased and fixed aliases]
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>