CI builds are done with debug info disabled, but this removes some
members from struct module.  This causes builds to fail if there is an
ABI reference for the current ABI.

Define these members unconditionally, so that there is no ABI change.

Enhanced Strobe and clock gating are set in the SDHCI_VENDOR register,
so make the driver aware it needs to do this for this controller.

Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>

Samsung EVO Plus, Pro Plus and Evo Ultimate cards of this era appear to
have a broken cache-flush implementation when operating in CQ mode.

Unfortunately the cards seem to use a separate CID name string for every
variant and capacity, so nobble the cache feature for this MANFID, OEMID
and year. Turning this off seems to have negligible impact on
random-write throughput in non-CQ mode.

Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>

Applying MMC_QUIRK_BROKEN_SD_CACHE is broken, as the card's extended
registers are parsed prior to the quirk being applied in mmc_blk.

Split this out into an SD-specific list of quirks and apply in
mmc_sd_init_card instead.

Fixes: c467c8f0

 ("mmc: Add MMC_QUIRK_BROKEN_SD_CACHE for Kingston Canvas Go Plus from 11/2019")

Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>

Signed-off-by: Dom Cobley <popcornmix@gmail.com>

This supports reading and writing OTP using the firmware
mailbox interface.

It needs supporting firmware to run.

Signed-off-by: Dom Cobley <popcornmix@gmail.com>

When setting the interrupt type, it is unlikely that any latched events
are of interest, so clear them.

Signed-off-by: Phil Elwell <phil@raspberrypi.com>

See: https://github.com/raspberrypi/linux/issues/6077



Signed-off-by: Phil Elwell <phil@raspberrypi.com>

Support the use of the brcm,pins property for GPIOs in banks 1 and 2,
but only for inputs and outputs - no other legacy mapping.

Signed-off-by: Phil Elwell <phil@raspberrypi.com>

The GPIO start for each bank - min_gpio - must be used in the IRQ
handler.

Signed-off-by: Phil Elwell <phil@raspberrypi.com>

See: https://github.com/raspberrypi/linux/issues/6077



Signed-off-by: Phil Elwell <phil@raspberrypi.com>

This reverts commit a3d53c8e.

In the absence of a value in Device Tree, set the SDA hold time to half
the SCL low time.

Signed-off-by: Phil Elwell <phil@raspberrypi.com>

Disable HS400 support on CM5 until this is proved to be stable.

Signed-off-by: Tim Gover <tim.gover@raspberrypi.com>

Newer versions of the DesignWare I2C block support the detection of
stuck signals, and a mechanism to recover from them. Add the required
software support to the driver.

This change was prompted by the observation that reading a single byte
from register 0 of a VEML7700 seems to cause it to issue an ACK too
early, and the controller to complain about losing arbitration. There
is a suspicion that this may be a more widespread problem, but at least
this patch prevents the bus from locking up.

See: https://github.com/raspberrypi/linux/issues/6057



Signed-off-by: Phil Elwell <phil@raspberrypi.com>

The spec allows for up to two 512-byte pages to be allocated for the
Extension Register General Info block, so allocate accordingly.

Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>

Also report the card's supported queue depth in the message log.

Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>

Don't attempt to turn on CQ if the other mandatory features are not
indicated as supported by the card. Also make sure that the register write
actually stuck, as some cards claim support but never report back that
the queue engine is enabled.

Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>

Certain status bits in these registers may need polling outside of
SD-specific code. Export in sd_ops.h

Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>

The eMMC spec says that in certain circumstances the controller can't
respond to a halt request - in practice, this occurs if a CMD
timeout happens (card went away/crashed).

Clear the halt request by writing 0 to CQHCI_CTL. Also fix a logic error
testing for halt in cqhci_request.

Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>

Add support for the PCF2131 RTC to the i2c-rtc and i2c-rtc-gpio
overlays.

Since I noticed that sometimes changing sample rates causes some digital
quirks and noises, I've changed the function to mute the output before
performing the changes and then unmute it when an error occurs or the
parameters got set.

Signed-off-by: Alessandro Marcon <marconalessandro04@gmail.com>

The RPi5 firmware also supports exporting the customer
public key stored in flash via device-tree. Define the
node so that the firmware can populate it.

Signed-off-by: Tim Gover <tim.gover@raspberrypi.com>

The default was to have enable_bg_fill disabled and the first
plane set it if it wasn't opaque and covering the whole screen.
However that meant that if no planes were enabled, then the
background fill wasn't enabled, and would give a striped
output from the uninitialised output buffer.

Initialise it to enabled to avoid this.

Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>

For unknown reasons the controller seems to reset the idle polling timer
interval on CQE enable/disable to 8 clocks which is extremely short.

Just use the reset value in the eMMC spec (4096 clock periods which at
200MHz is ~20uS).

Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>

This provides the missing cache information for bcm2712

lscpu now reports:

Caches (sum of all):
  L1d:                    256 KiB (4 instances)
  L1i:                    256 KiB (4 instances)
  L2:                     2 MiB (4 instances)
  L3:                     2 MiB (1 instance)

Signed-off-by: Dom Cobley <popcornmix@gmail.com>

Command Queueing on Linux with SD cards is new, with the potential to cause
filesystem corruption due to bugs in software or card firmware(s).

Default to disabled unless a) we know the interface connects to an eMMC
device or b) we want it switched on.

Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>

Add a LED_FULL trigger equivalent to mmc_start_request() in
mmc_cqe_start_req(), otherwise it stays off forever.

Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>

The Performance Extension register is regularly accessed in a hot path
to do write cache flushes. Don't invoke kmalloc/kfree for every access,
preallocate a 512B buffer for this purpose.

Also remove an unused alloc in sd_enable_cache().

Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>

The bootloader sets this as the controller base clock.

Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>

CQHCI keeps track of tags in flight with internal timers, so the clock
frequency driving the timer needs to be specified. The config registers
default to 0 (100kHz) which means timeouts will be significantly shorter
than they should be. Assume the timer clock comes from the controller
base clock.

Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>

Application class A2 cards require CQ to be enabled to realise their
stated performance figures. Add support to enable/disable card CQ via
the Performance Enhancement extension register, and cater for the slight
differences in command set versus eMMC.

Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>

This reverts commit d7a31988.

See: https://github.com/raspberrypi/bookworm-feedback/issues/239



Signed-off-by: Phil Elwell <phil@raspberrypi.com>

Make i2c_csi_dsi an alias for i2c_csi_dsi1, and remove the spurious
redefinition in the cm5 .dts files.

Signed-off-by: Phil Elwell <phil@raspberrypi.com>

The upstream Pi DTS files select serial1 for stdout-path, but because of
the way the downstream kernel numbers UARTS, serial0 is required in the
downstream DTS. Using the wrong value breaks U-boot.

In the 6.6 kernel the downstream Pi 400 DTS was made closer to upstream,
inheriting most of its content from the Pi 4B DTS, but because of the
order of inclusion it lost the override for stdout-path. Restore that
override.

See: https://github.com/raspberrypi/firmware/issues/1875


Signed-off-by: Phil Elwell <phil@raspberrypi.com>

As we have never released a (standard) DACplusADC board with onboard
clocks, we can simply use a fixed setup avoiding incompatibilities
with Pi5 during driver init. Setting 'hifiberry-dacplusadc,slave' in
the overlays disables the failing clock probing mechanism.

Removes 'slave' parameter description from README which is still
supported but not needed.

Signed-off-by: j-schambacher <joerg@hifiberry.com>

Same issue as #5919.
'width' needs to be set independent of clocking mode.

Signed-off-by: j-schambacher <joerg@hifiberry.com>

Adds all available Hifberry cards' UUIDs to the hat_map file.

Signed-off-by: j-schambacher <joerg@hifiberry.com>

As the easy switching of the I2S module bewteen clock producer/consumer
on the PI5 is not possible, two specific DT-overlays are introduced.
The DAC+PRO boards with onboard clocks use the -PRO overlay, the boards
without oscillators the -STD version.
The "hifiberry-dacplus,slave" parameter in the -STD overlay disables
the automatic clock detection inside the hifiberry-dacplus driver.

The former hifiberry-dacplus overlay is kept for compatibility but
will be deprecated.

Signed-off-by: j-schambacher <joerg@hifiberry.com>