This patch adds the device tree to support Toradex Colibri T30, a
computer on module which can be used on different carrier boards.

The module consists of a Tegra 30 SoC, two PMIC, DDR3L RAM, eMMC,
a LM95245 temperature sensor and an AX88772B USB Ethernet
Controller. Furthermore, there is a STMPE811 and SGTL5000 audio
codec which are not yet supported. Anything that is not self
contained on the module is disabled by default.

The device tree for the Evaluation Board includes the modules
device tree and enables the supported pheripherials of the carrier
board (the Evaluation Board supports almost all of them).

Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Stephen Warren <swarren@nvidia.com>

NVIDIA SHIELD is a portable Android console containing a Tegra 4 SoC with
2GB RAM and a 720p panel.

The following hardware is enabled by this device tree: UART, eMMC, USB
(needs external power), PMIC, backlight, joystick, SD card, GPIO keys.

DSI panel, HDMI output, charger, self-powered USB, audio, wifi bluetooth
are not supported yet but might be by future patches (likely in that
order).

Touch panel and sensors will probably never be supported.

Initrd addresses are hardcoded to match the static values used by the
bootloader, since it won't add them for us. All the same, a kernel
command-line is provided to replace the one passed by the
bootloader which is filled with garbage.

NVIDIA SHIELD is typically booted with an appended DTB to avoid
modifications made by the bootloader.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
[swarren, fixed gpio-keys child node sort order, patch description]
Signed-off-by: Stephen Warren <swarren@nvidia.com>

Venice2 can detect write-protect on the SD card. Add the required
DT entries to allow this.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
[swarren: fixed GPIO polarity per Thierry's testing]
Tested-by: Thierry Reding <treding@nvidia.com>

Tegra Note 7 is a consumer tablet embedding a Tegra 4 SoC with 1GB RAM
and a 720p panel.

The following hardware is enabled by this device tree: UART, eMMC, USB
(needs external power), PMIC, backlight, DSI panel, keys.

SD card, HDMI, charger, self-powered USB, audio, wifi, bluetooth are not
yet supported but might be by future patches (likely in that order).

Touch panel, sensors & cameras will probably never be supported.

Pinctrl is not set yet, as the bootloader-provided values allow us to
use the currently supported hardware.

Initrd addresses are hardcoded to match the static values used by the
bootloader, since it won't add them for us. All the same, a kernel
command-line is provided to replace the one passed by the bootloader
which is filled with garbage.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
[treding@nvidia.com: DT fixes, DSI panel support]
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>

Dalmore can detect write-protect on the SD card. Add the required
DT entries to allow this.

Signed-off-by: Stephen Warren <swarren@nvidia.com>

Jetson TK1 can detect write-protect on the SD card. Add the required
DT entries to allow this.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Thierry Reding <treding@nvidia.com>

Jetson TK1 contains an RT5639 not an RT5640. While the two are extremely
similar and mostly compatible, we should still use the correct device
name in the device tree. I had meant to fix this before applying the
initial DT, but this issue slipped my mind.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>

The 1.2V supply for CSI and DSI was previously marked always-on. This is
suboptimal because it prevents the supply from being disabled when there
is no activity in the display or capture paths that it powers.

Hook up the regulator to the DSI output and mark it as not always-on, so
that it will only be enabled when DSI actually needs it.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>

This supply controls the +5V pin on the HDMI connector, which in turn is
used by attached sinks to return the hotplug detect signal.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>

This supply controls the +5V pin on the HDMI connector, which in turn is
used by attached sinks to return the hotplug detect signal.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>

This supply controls the +5V pin on the HDMI connector, which in turn is
used by attached sinks to return the hotplug detect signal.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>

Add HDMI +5V, VDD and PLL regulators and enable the DDC I2C controller.
Enable the HDMI device, provide the power supplies as well as the DDC
adapter and use pin the standard pin (PN7) for hotplug detection.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>

Add HDMI +5V, VDD and PLL regulators and enable the DDC I2C controller.
Enable the HDMI device, provide the power supplies as well as the DDC
adapter and use the standard pin (PN7) for hotplug detection.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>

Add a device node for the HDMI controller found on Tegra124.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>

VDDIO_SDMMC3 is the VQMMC (I/O) supply, not the VMMC (core) supply,
for the SD slot on Venice2.

Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Signed-off-by: Stephen Warren <swarren@nvidia.com>

This regulator supplies power to pretty much everything on the board, so
it doesn't make sense to allow it to turn off. Mark it boot-on and
always-on so it doesn't get turned off. Without this, I see issues with
the eMMC device; it can't be correctly detected during boot.

Signed-off-by: Stephen Warren <swarren@nvidia.com>

Regulator vddio_sdmmc3 provides the Tegra<->SD IO voltage, not the card
core supply voltage. That is, it provides vqmmc, not vmmc. Fix the DT to
correctly reflect this.

Reported-by: Andrew Bresticker <abrestic@chromium.org>
Signed-off-by: Stephen Warren <swarren@nvidia.com>

These are mostly identical to the Venice2 regulator definitions, since
the board designs are very similar. Differences are:

- Jetson TK1 doesn't have a built-in LCD panel, so on-board regulators
  are not present for the backlight, touchscreen, or panel.
- +3.3V_RUN needs to be boot-on/always-on, since it's widely used. This
  change should likely be propagated to Venice2 for completeness,
  although it will have no practical effect there since various other
  regulators use +3.3V_RUN as their supply and are always-on.
- +3.3V_LP0 needs to be boot-on as well as always-on. One reason
  is because it's used to driver the UART level-shifter; without this, I
  see a brief period of UART corruption during cold boots.I suspect this
  change needs to be propagated to Venice2, and we simply haven't noticed
  the need since there's no UART level-shifter on Venice2.
- A few rails have different names in the schematics.

Signed-off-by: Stephen Warren <swarren@nvidia.com>

Jetson TK1 is an NVIDIA Tegra124 development board, containing Tegra124,
2GB RAM, eMMC, SD card, SPI flash, serial port, PCIe Ethernet, HDMI,
audio, mini PCIe, JTAG, SATA, and an expansion IO connector containing
GPIOs, I2C, SPI, CSI, eDP, etc.

The following features work with this device tree: UART, SD card, eMMC,
SPI flash, USB (full-size jack, and mini-PCIe), audio, AS3722 RTC, system
power-off, suspend/resume (LP1) with wake via RTC alarm.

The following features should work with this device tree, but are not
validated: Expansion I2C, expansion SPI, expansion GPIO, gpio-key for the
power button.

The following features are not yet implemented in this device tree: Most
voltage regulators, expansion UART, HDMI, eDP, PCIe (Ethernet, and mini-
PCIe connector), CSI, SATA.

Signed-off-by: Stephen Warren <swarren@nvidia.com>

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

The patch adds asm macros for inc_preempt_count and dec_preempt_count_ti
(which also gets the current thread_info) instead of open-coding them in
arch/arm/vfp/*.S files.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Tested-by: Arun KS <getarunks@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

asm/assembler.h is a better place for this macro since it is used by
asm files outside arch/arm/kernel/

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Tested-by: Arun KS <getarunks@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

Check cpu id in pj4_cp0_init. So for no-PJ4 V7 cpus,
pj4_cpu0_init just return.
This fix will help to make the all the V7 cpus(PJ4 and no-PJ4)
can use code.

Signed-off-by: Chao Xie <chao.xie@marvell.com>
Reviewed-by: Kevin Hilman <khilman@linaro.org>
Tested-by: Kevin Hilman <khilman@linaro.org>
Tested-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Matt Porter <mporter@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

The patch add cpu_is_pj4 at arch/arm/include/asm/cputype.h
PJ4 has some differences with V7, for example the coprocessor.
To disinguish this kind of situation. cpu_is_pj4 is needed.

Signed-off-by: Chao Xie <chao.xie@marvell.com>
Reviewed-by: Kevin Hilman <khilman@linaro.org>
Tested-by: Kevin Hilman <khilman@linaro.org>
Tested-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Matt Porter <mporter@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

arm_pm_restart(), arm_pm_idle() and soft_restart() are all declared in
system_misc.h, but this file is not included in process.c.  Add this
missing include.  Found via sparse:

arch/arm/kernel/process.c:98:6: warning: symbol 'soft_restart' was not declared. Should it be static?
arch/arm/kernel/process.c:127:6: warning: symbol 'arm_pm_restart' was not declared. Should it be static?
arch/arm/kernel/process.c:134:6: warning: symbol 'arm_pm_idle' was not declared. Should it be static?

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

If the renamed symbol is defined lib/iomap.c implements ioport_map and
ioport_unmap and currently (nearly) all platforms define the port
accessor functions outb/inb and friend unconditionally.  So
HAS_IOPORT_MAP is the better name for this.

Consequently NO_IOPORT is renamed to NO_IOPORT_MAP.

The motivation for this change is to reintroduce a symbol HAS_IOPORT
that signals if outb/int et al are available.  I will address that at
least one merge window later though to keep surprises to a minimum and
catch new introductions of (HAS|NO)_IOPORT.

The changes in this commit were done using:

	$ git grep -l -E '(NO|HAS)_IOPORT' | xargs perl -p -i -e 's/\b((?:CONFIG_)?(?:NO|HAS)_IOPORT)\b/$1_MAP/'

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>

Strictly speaking this call is a no-op on the platform where dcscb.c is
used since it only has architected caches.  The call was there as a hint
to people inspired by this code when writing their own backend, but the
hint might not always be correct.

For example, if a PL310 were to be used it wouldn't be safe to call
the regular outer_flush_all() as atomic instructions for locking
are involved in that case and those instructions cannot be assumed to
still be operational after v7_exit_coherency_flush() has returned.
Given no other CPUs (in the cluster) should be running at that point
then standard concurrency concerns wouldn't apply.

So let's simply kill this call for now and enhance the existing comment.

Signed-off-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

On non-LPAE ARMv6+, read-only PMD bits are defined with the combination
"PMD_SECT_APX | PMD_SECT_AP_WRITE". Adjusted the bit masks to correctly
report this.

Signed-off-by: Kees Cook <keescook@chromium.org>
Tested-by: Laura Abbott <lauraa@codeaurora.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

When we configure CONFIG_ARM_LPAE=y, pfn << PAGE_SHIFT will
overflow if pfn >= 0x100000 in copy_oldmem_page.
So use __pfn_to_phys for converting.

Signed-off-by: Liu Hua <sdu.liu@huawei.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

Use of tracers in local_irq_disable is causes abort loops when called
with irqs disabled using a temporary stack.  Replace local_irq_disable
with raw_local_irq_disable instead to avoid tracers.

Signed-off-by: Sebastian Capella <sebastian.capella@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

The patch changes fimd node status to OK.

Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>

The patch changes fimd node status to OK.

Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>

The patch adds s6e8aa0 panel node for trats2.
It adds also trats2 specific properties for DSI
and regulator required by panel.

Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>

The patch adds s6e8aa0 panel node for trats.
It adds also trats specific properties for DSI.

Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>

This is a common part of DSI node for all Exynos4 boards.

Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>

This patch replaces panel bindings for panel initialized by boot loader
with bindings to proper ld9040 panel.

Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>

Remove pdata quirks for the displays on boards that are now supported
properly with DT.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>

Export the DMA register information from the SoC specific data, such
that we can access the registers directly in omap-dma.c, mapping the
register region ourselves as well.

Rather than calculating the DMA channel register in its entirety for
each access, we pre-calculate an offset base address for the allocated
DMA channel and then just use the appropriate register offset.

Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

The omap_system_dma_plat_info structure is only seven words, it's not
worth the expense of kmalloc()'ing backing store for this only to
release it later.  Note that platform_device_add_data() copies the
data anyway.  Clean up the initialisation of this structure - we don't
even need code to initialise most of this structure.

Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

This really needs to be there, because otherwise the plat-omap code can
kfree() this data structure, and then re-use the pointer later.

Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>