- Oct 01, 2013
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Barry Song authored
Makefile missed to include atlas6-evb.dtb for ARCH_ATLAS6. Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Olof Johansson <olof@lixom.net>
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Qipan Li authored
sirf uart and usp-based uart driver with full dma support has hit 3.12, here we fix the fifosize, dma channels for some HW prop. Signed-off-by: Qipan Li <Qipan.Li@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Olof Johansson <olof@lixom.net>
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- Sep 26, 2013
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Joerg Roedel authored
This fixes a compile error where CONFIG_PCI is disabled: LD init/built-in.o arch/arm/mach-integrator/built-in.o: In function `ap_map_io': integrator_cp.c:(.init.text+0x570): undefined reference to `pci_v3_early_init' make[1]: *** [vmlinux] Error 1 make: *** [sub-make] Error 2 Cc: stable@vger.kernel.org Signed-off-by: Joerg Roedel <joro@8bytes.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Olof Johansson <olof@lixom.net>
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- Sep 20, 2013
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Quentin Armitage authored
There appears to be an error in the second address of the second XOR engine in the Kirkwood SoC device tree, which is specified as 0xd0b00 but should be 0x60b00. For confirmation of address see table 581 page 658 of: http://www.marvell.com/embedded-processors/kirkwood/assets/FS_88F6180_9x_6281_OpenSource.pdf Also see definition of XOR1_HIGH_PHYS_BASE in arch/arm/mach-kirkwood/include/mach/kirkwood.h Signed-off-by: Quentin Armitage <quentin@armitage.org.uk> Reviewed-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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- Sep 19, 2013
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Michael Opdenacker authored
This flag is a NOOP since 2.6.36 and can be removed. This is an update for 3.11 of a patch already sent for 3.10 Signed-off-by: Michael Opdenacker <michael.opdenacker@free-electrons.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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Nicolas Ferre authored
Reported-by: Jiri Prchal <jiri.prchal@aksignal.cz> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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Jiri Prchal authored
Replace pinctrl_usart2_rts and pinctrl_usart2_cts istead of pinctrl_uart2_*. Signed-off-by: Jiri Prchal <jiri.prchal@aksignal.cz> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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Brian Norris authored
If neither CONFIG_SND_DM365_AIC3X_CODEC nor CONFIG_SND_DM365_VOICE_CODEC are defined, we may get warnings like: arch/arm/mach-davinci/board-dm365-evm.c:179:33: warning: 'dm365_evm_snd_data' defined but not used [-Wunused-variable] To fix this, just mark the struct as __maybe_unused. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Cc: Sekhar Nori <nsekhar@ti.com> Cc: Kevin Hilman <khilman@deeprootsystems.com> Cc: Russell King <linux@arm.linux.org.uk> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
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Sekhar Nori authored
commit fcf7157b ("ARM: davinci: serial: get rid of davinci_uart_config") introduced build breakage because of a misplaced header file include which cause a bunch of errors when the file is included in assembly code (like debug-macro.S) Fix the build breakage. Reported-by: Alexander Holler <holler@ahsoftware.de> Tested-by: Alexander Holler <holler@ahsoftware.de> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
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Linus Walleij authored
This is just a standard board for the Ux500, include it in the v7 multiplatform defconfig. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Olof Johansson <olof@lixom.net>
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Phil Carmody authored
Fix trivial typo in name. Signed-off-by: Phil Carmody <phil.carmody@partner.samsung.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Anoop Thomas Mathew authored
Corrected the functions spelling mistake in the OMAP4 SMP source file. Signed-off-by: Anoop Thomas Mathew <atm@profoundis.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Vladimir Murzin authored
We call cpu_cluster_pm_enter for dev->cpu == 0 only, but cpu_cluster_pm_exit called without that check. Because of that unhandled page fault may happen: [ 3.803405] Unable to handle kernel paging request at virtual address 00002500 [ 3.810974] pgd = c0004000 [ 3.813812] [00002500] *pgd=00000000 [ 3.817596] Internal error: Oops: 5 [#1] SMP ARM [ 3.822418] Modules linked in: [ 3.825653] CPU: 1 PID: 0 Comm: swapper/1 Not tainted 3.11.0-rc6+ #21 [ 3.832397] task: ed86ef40 ti: ed896000 task.ti: ed896000 [ 3.838073] PC is at irq_notifier+0x234/0x25c [ 3.842651] LR is at irq_notifier+0x218/0x25c [ 3.847229] pc : [<c0029ed8>] lr : [<c0029ebc>] psr: 80000193 [ 3.847229] sp : ed897ee8 ip : 00000005 fp : 00000001 [ 3.859283] r10: c0b395f0 r9 : c0b30594 r8 : c0b8c2ac [ 3.864776] r7 : ffffffff r6 : 00000000 r5 : 00000005 r4 : 00000000 [ 3.871643] r3 : 00002500 r2 : 00000000 r1 : 00000005 r0 : 44302244 [ 3.878479] Flags: Nzcv IRQs off FIQs on Mode SVC_32 ISA ARM Segment kernel [ 3.886260] Control: 10c5387d Table: 8000404a DAC: 00000015 [ 3.892272] Process swapper/1 (pid: 0, stack limit = 0xed896240) [ 3.898590] Stack: (0xed897ee8 to 0xed898000) [ 3.903167] 7ee0: c0979c3a 00000001 ed897ef8 ed896000 c0014f7c 00000000 [ 3.911743] 7f00: 00000005 00000000 ffffffff c0b8c2ac c0b395f0 c077c04c c0c94b48 c0b3953c [ 3.920318] 7f20: c0bcd928 00000002 c0b39524 c00cfad8 00000000 ffffffff 00000000 c00cfb10 [ 3.928924] 7f40: c14e62c0 c002c1c8 c002c0ac c14e62c0 00000002 e251c37d 00000000 c0b39548 [ 3.937499] 7f60: c0b395f0 c05a1bc4 e251c37d 00000000 00000005 c05a3870 edc90380 edc90380 [ 3.946105] 7f80: edc90394 c14e62c0 c0b39548 00000002 c0784064 c05a3c78 c0b395e0 c14e62c0 [ 3.954681] 7fa0: 00000002 c0b39548 c0bc9db8 00000000 00000001 c05a1dc0 ed896000 00000015 [ 3.963287] 7fc0: c0bc9db8 ed896000 8000406a c0b30594 c0784064 c000e504 00000746 c007a528 [ 3.971862] 7fe0: 00000001 0000001d 600001d3 c0bcc004 00000000 800086c4 ee0aa6a7 d2aabaa9 [ 3.980499] [<c0029ed8>] (irq_notifier+0x234/0x25c) from [<c077c04c>] (notifier_call_chain+0x38/0x68) [ 3.990173] [<c077c04c>] (notifier_call_chain+0x38/0x68) from [<c00cfad8>] (cpu_pm_notify+0x20/0x38) [ 3.999786] [<c00cfad8>] (cpu_pm_notify+0x20/0x38) from [<c00cfb10>] (cpu_cluster_pm_exit+0x20/0x50) [ 4.009399] [<c00cfb10>] (cpu_cluster_pm_exit+0x20/0x50) from [<c002c1c8>] (omap_enter_idle_coupled+0x11c/0x14c) [ 4.020111] [<c002c1c8>] (omap_enter_idle_coupled+0x11c/0x14c) from [<c05a1bc4>] (cpuidle_enter_state+0x40/0xec) [ 4.030822] [<c05a1bc4>] (cpuidle_enter_state+0x40/0xec) from [<c05a3c78>] (cpuidle_enter_state_coupled+0x1f4/0x240) [ 4.041870] [<c05a3c78>] (cpuidle_enter_state_coupled+0x1f4/0x240) from [<c05a1dc0>] (cpuidle_idle_call+0x150/0x228) [ 4.052947] [<c05a1dc0>] (cpuidle_idle_call+0x150/0x228) from [<c000e504>] (arch_cpu_idle+0x8/0x38) [ 4.062499] [<c000e504>] (arch_cpu_idle+0x8/0x38) from [<c007a528>] (cpu_startup_entry+0x178/0x1e4) [ 4.071990] [<c007a528>] (cpu_startup_entry+0x178/0x1e4) from [<800086c4>] (0x800086c4) [ 4.080383] Code: e5922288 03a03b0a 13a03c25 e0823003 (e5932000) [ 4.086791] ---[ end trace d83954a84a6fa69e ]--- It is supposed that sar_base is initialized in irq_save_context, which is called on CPU_CLUSTER_PM_ENTER notification. If this notification has been missed and CPU_CLUSTER_PM_EXIT is received sar_base is NULL. Fix it by calling CPU_CLUSTER_PM_{ENTER,EXIT} under the same condition. Signed-off-by: Vladimir Murzin <murzin.v@gmail.com> Acked-by: Kevin Hilman <khilman@linaro.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Fabio Estevam authored
When CONFIG_ARM_LPAE=y the following build warning is generated: arch/arm/mach-omap2/gpmc.c:1495:4: warning: format '%x' expects argument of type 'unsigned int', but argument 4 has type 'resource_size_t' [-Wformat] According to Documentation/printk-formats.txt '%pa' can be used to properly print 'resource_size_t'. Reported-by: Kevin Hilman <khilman@linaro.org> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Kevin Hilman <khilman@linaro.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Wei Yongjun authored
In case of error, the function omap_device_alloc() returns ERR_PTR() and never returns NULL. The NULL test in the return value check should be replaced with IS_ERR(). Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Acked-by: Kevin Hilman <khilman@linaro.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Tony Lindgren authored
Looks like we still have the legacy clock alias name for omap4 GPMC (General Purpose Memory Controller), so let's fix it for the device tree naming. There's no need to keep the legacy naming as omap4 is DT only nowadays. Without this fix we get the following error while booting: [ 0.440399] omap-gpmc 50000000.gpmc: error: clk_get Reported-by: Olof Johansson <olof@lixom.net> Cc: stable@vger.kernel.org # v3.11 Signed-off-by: Tony Lindgren <tony@atomide.com>
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Ezequiel Garcia authored
With the addition of the Armada XP reference clock, we can now model accurately the available clock inputs for the timer: namely, nbclk and refclk. For each of this clock inputs we assign a name, for the driver to select as appropriate. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Reviewed-by: Mike Turquette <mturquette@linaro.org> Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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Ezequiel Garcia authored
The Armada XP SoC has a reference 25 MHz fixed-clock that is used in some controllers such as the timer and the watchdog. This commit adds a DT representation of this clock through a fixed-clock compatible node. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Reviewed-by: Mike Turquette <mturquette@linaro.org> Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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Andrew Lunn authored
The kirkwood.dtsi cpu@0 node is missing the mandatory reg property. This causes of_get_cpu_node() to fail to find the node and as a result the cpufreq driver fails in its probe function. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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Jisheng Zhang authored
Add of_node_put to properly decrement the refcount when we are done using a given node. Signed-off-by: Jisheng Zhang <jszhang@marvell.com> Reviewed-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net> Conflicts: arch/arm/mach-mvebu/armada-370-xp.c arch/arm/mach-mvebu/platsmp.c
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- Sep 18, 2013
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Andrea Adami authored
Zaurus collie contains 2 LH28F640BFHE-PTTL90 (64M 4Mx16) and at the moment cfi will not detect the collie NOR. In the meanwhile we can revert to the jedec-probe map which has been fixed with following commit: mtd: jedec_probe: fix LH28F640BF definition fe2f4c8e Somehow this is unsatisfactory because the flash is mounted READ ONLY (as from factory, with a RO cramfs) Signed-off-by: Andrea Adami <andrea.adami@gmail.com> Signed-off-by: Olof Johansson <olof@lixom.net>
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Linus Walleij authored
Right now the U300 submenus are showcased for everyone even if we're not on v5 multiplatforms. Hide this in the multiplatform configuration properly. Cc: arm@kernel.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Olof Johansson <olof@lixom.net>
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Enric Balletbo i Serra authored
Add pinmux configuration for MCBSP2 connected to the TDM interface. With this configuration the Headset modules works as expected. Signed-off-by: Enric Balletbo i Serra <eballetbo@gmail.com> Acked-by: Javier Martinez Canillas <javier@dowhile0.org> Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
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Tony Lindgren authored
Commit 76787b3b (ARM: OMAP2+: Remove board-4430sdp.c) removed legacy booting in favor of device tree based booting for 4430sdp. That caused the WLAN to stop working as the related .dts entries fell through the cracks. I don't have the "1283 PG 2.21 connectivity device" on my 4430sdp, but the earlier version of this patch was tested by Luciano Coelho. This version has left out the input logic for MMC CLK line compared to the earlier version as that is not bidirectional, and should be safe to do. Cc: Rajendra Nayak <rnayak@ti.com> Cc: Luciano Coelho <luca@coelho.fi> Cc: Ruslan Bilovol <ruslan.bilovol@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
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Tony Lindgren authored
Commit b42b9181 (ARM: OMAP2+: Remove board-omap4panda.c) removed legacy booting in favor of device tree based booting for pandaboard. That caused the WLAN to stop working as the related .dts entries fell through the cracks. The legacy muxing was setting pulls for GPIO 48 and 49, so let's keep that behaviour for now to avoid further regressions for BT and FM. Also input logic was enabled for MMC CLK line, but I've verified that the input logic we don't need enabled for CLK line as it's not bidirectional. Also, we want to use non-removable instead of ti,non-removable as the ti,non-removable also sets no_regulator_off_init which is really not what we want as then wl12xx won't get powered up and down which is needed for resetting it. Note that looks like the WLAN interface fails to come up after a warm reset, but that most likely was also happening with the legacy booting and needs a separate fix. Cc: Paolo Pisati <p.pisati@gmail.com> Cc: Rajendra Nayak <rnayak@ti.com> Cc: Luciano Coelho <luca@coelho.fi> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
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Olof Johansson authored
Without this, legacy platforms that can boot with a multiplatform kernel but that need the DTB to be appended, won't have a way to pass firmware-set bootargs to the kernel. This is needed to boot multi_v7_defconfig on snowball, for instance. Signed-off-by: Olof Johansson <olof@lixom.net>
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Linus Walleij authored
This fixes a multiplatform regression on the Ux500. When compiling the Ux500 platforms in multiplatform configurations both PL310_ERRATA_588369 and PL310_ERRATA_727915 would crash the platform when trying to launch the init process. The Ux500 cannot access the debug registers of the PL310, it will just crash if you try this. So disable this by setting the debug callback to NULL when initializing the l2x0 on this platform. Cc: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Olof Johansson <olof@lixom.net>
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- Sep 17, 2013
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Felipe Balbi authored
Fix the DTS data for ocp2scp node by adding the missing reg property. Signed-off-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
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Felipe Balbi authored
USB3 block has a 64KiB space, another 64KiB is used for the wrapper. Without this change, resource_size() will get confused and driver won't probe because size will be negative. Signed-off-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
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Koen Kooi authored
The BeagleBone Black is basically a regular BeagleBone with eMMC and HDMI added, so create a common dtsi both can use. IMPORTANT: booting the existing am335x-bone.dts will blow up the HDMI transceiver after a dozen boots with an uSD card inserted because LDO will be at 3.3V instead of 1.8. MMC support for AM335x still isn't in, so only the LDO change has been added. Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> Tested-by: Tom Rini <trini@ti.com> Tested-by: Matt Porter <matt.porter@linaro.org> Acked-by: Kevin Hilman <khilman@linaro.org> Tested-by: Kevin Hilman <khilman@linaro.org> Tested-by: Joel Fernandes <joelf@ti.com> Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
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Robert Nelson authored
The beagle and beagle-xm entries were inside the same double quote. Split them to have two distinct entries. Signed-off-by: Robert Nelson <robertcnelson@gmail.com> Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
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Huang Shijie authored
The patch "0b7a76aa ARM: dts: imx6q{dl}: add DTE pads for uart" adds the DTE pads for uart. For PAD_EIM_D29, the offset of the Pad Mux register should be 0x0c8, not 0x0c4. This patch fixes it. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Jason Liu authored
The L2 cache controller(PL310) version on the i.MX6D/Q is r3p1-50rel0 The L2 cache controller(PL310) version on the i.MX6DL/SOLO/SL is r3p2 But according to ARM PL310 errata: 752271 ID: 752271: Double linefill feature can cause data corruption Fault Status: Present in: r3p0, r3p1, r3p1-50rel0. Fixed in r3p2 Workaround: The only workaround to this erratum is to disable the double linefill feature. This is the default behavior. without this patch, you will meet the following error when run the memtester application at: http://pyropus.ca/software/memtester/ FAILURE: 0x00100000 != 0x00200000 at offset 0x01365664. FAILURE: 0x00100000 != 0x00200000 at offset 0x01365668. FAILURE: 0x00100000 != 0x00200000 at offset 0x0136566c. FAILURE: 0x00100000 != 0x00200000 at offset 0x01365670. FAILURE: 0x00100000 != 0x00200000 at offset 0x01365674. FAILURE: 0x00100000 != 0x00200000 at offset 0x01365678. Signed-off-by: Jason Liu <r64343@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Arnaud Patard authored
Commit 718a3500 (ARM: i.MX51: Add PATA support) adds pata support to the imx51.dtsi file and is using clock 161. The problem is that the right clock is 172, according to commit 5d530bb0 (ARM: i.MX5: Add PATA and SRTC clocks). Using the clock 172 makes things work again (and kills a nasty system freeze). Tested-by: Steev Klimaszewski <steev@gentoo.org> Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Fabio Estevam authored
Since commit beb2d1c1 (ARM i.MX5: Add S/PDIF clocks), the following clock error appears on mx51: TrustZone Interrupt Controller (TZIC) initialized i.MX51 clk 180: register failed with -17 i.MX5 clk 180: register failed with -17 sched_clock: 32 bits at 24MHz, resolution 41ns, wraps every 178956ms CPU identified as i.MX51, silicon rev 3.0 ... Clock 180 corresponds to 'spdif1_podf' and this clock is getting registered twice. Fix it, by properly registering the 'spdif1_pred' clock, which should not reference 'spdif1_podf'. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Shawn Guo authored
The clk_init_data.flags of clk-fixup-mux is left there without initialization. It may hold some random data and cause clock framework interpret the clock in an unexpected way. At least on imx6sl, the following division by zero error with sched_clock is seen because of it. Division by zero in kernel. CPU: 0 PID: 0 Comm: swapper/0 Not tainted 3.11.0-rc3+ #19 Backtrace: [<80011af0>] (dump_backtrace+0x0/0x10c) from [<80011c90>] (show_stack+0x18/0x1c) r6:3b9aca00 r5:00000020 r4:00000000 r3:00000000 [<80011c78>] (show_stack+0x0/0x1c) from [<8055e02c>] (dump_stack+0x78/0x94) [<8055dfb4>] (dump_stack+0x0/0x94) from [<80011924>] (__div0+0x18/0x20) r4:00000000 r3:00000000 [<8001190c>] (__div0+0x0/0x20) from [<8026c408>] (Ldiv0_64+0x8/0x18) [<8006330c>] (clocks_calc_mult_shift+0x0/0xf8) from [<8072f604>] (setup_sched_clock+0x88/0x1f0) [<8072f57c>] (setup_sched_clock+0x0/0x1f0) from [<8071ad48>] (mxc_timer_init+0xe8/0x17c) [<8071ac60>] (mxc_timer_init+0x0/0x17c) from [<807290b0>] (imx6sl_clocks_init+0x1db8/0x1dc0) r8:807a9ca4 r7:00000000 r6:80777564 r5:8100c1f4 r4:c0820000 [<807272f8>] (imx6sl_clocks_init+0x0/0x1dc0) from [<807420ac>] (of_clk_init+0x40/0x6c) [<8074206c>] (of_clk_init+0x0/0x6c) from [<807290cc>] (imx6sl_timer_init+0x14/0x18) r5:807a8e80 r4:ffffffff [<807290b8>] (imx6sl_timer_init+0x0/0x18) from [<80716e1c>] (time_init+0x24/0x34) [<80716df8>] (time_init+0x0/0x34) from [<80713738>] (start_kernel+0x1b0/0x310) [<80713588>] (start_kernel+0x0/0x310) from [<80008074>] (0x80008074) r7:80770b08 r6:80754cd4 r5:8076c8c4 r4:10c53c7d sched_clock: 32 bits at 0 Hz, resolution 0ns, wraps every 0ms Fix the bug by initializing init.flags as zero. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Gwenhael Goavec-Merou authored
CSPI PER clock is per2clk (per2_gate id 60) instead of cspiX_ipg_gate. Signed-off-by: Gwenhael Goavec-Merou <gwenhael.goavec-merou@armadeus.com> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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- Sep 13, 2013
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Martin Schwidefsky authored
After the last architecture switched to generic hard irqs the config options HAVE_GENERIC_HARDIRQS & GENERIC_HARDIRQS and the related code for !CONFIG_GENERIC_HARDIRQS can be removed. Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
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Johannes Weiner authored
Unlike global OOM handling, memory cgroup code will invoke the OOM killer in any OOM situation because it has no way of telling faults occuring in kernel context - which could be handled more gracefully - from user-triggered faults. Pass a flag that identifies faults originating in user space from the architecture-specific fault handlers to generic code so that memcg OOM handling can be improved. Signed-off-by: Johannes Weiner <hannes@cmpxchg.org> Reviewed-by: Michal Hocko <mhocko@suse.cz> Cc: David Rientjes <rientjes@google.com> Cc: KAMEZAWA Hiroyuki <kamezawa.hiroyu@jp.fujitsu.com> Cc: azurIt <azurit@pobox.sk> Cc: KOSAKI Motohiro <kosaki.motohiro@jp.fujitsu.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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Johannes Weiner authored
Kernel faults are expected to handle OOM conditions gracefully (gup, uaccess etc.), so they should never invoke the OOM killer. Reserve this for faults triggered in user context when it is the only option. Most architectures already do this, fix up the remaining few. Signed-off-by: Johannes Weiner <hannes@cmpxchg.org> Reviewed-by: Michal Hocko <mhocko@suse.cz> Acked-by: KOSAKI Motohiro <kosaki.motohiro@jp.fujitsu.com> Cc: David Rientjes <rientjes@google.com> Cc: KAMEZAWA Hiroyuki <kamezawa.hiroyu@jp.fujitsu.com> Cc: azurIt <azurit@pobox.sk> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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