- May 27, 2013
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Linus Walleij authored
This makes sure the new ccu8540 DTB file is generated by the build system. Cc: Lee Jones <lee.jones@linaro.org> Cc: Gabriel Fernandez <gabriel.fernandez.st@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Lee Jones authored
The PRCMU's Tightly Coupled Data Memory on the DB8540 platform is 8kB larger than it's predecessor's. We need to reflect that in its Device Tree. By re-specifying the address and size of the device we effectively over-ride the previous values with more accurate ones. Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Lee Jones authored
This is a skeleton DTS file which only enables serial. Just using this simple file yields a terminal when booting u8540. Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Lee Jones authored
It's now possible to configure memcpy channels dynamically with DT. We're providing them despite the fact that they're the same as the hard-coded channels, as they will be removed once the u8500 platform goes DT-only. Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Lee Jones authored
This patch provides all the information to successfully probe() and correctly configure the ux500-musb device driver for DMA. Acked-by: Fabio Baltieri <fabio.baltieri@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Lee Jones authored
When requesting a channel, a DMA client needs to pass some pieces of information such as; request channel, device type, channel type and direction etc. Normally we do this in the form of platform data, but when DT is enabled we need to pass it using the driver's bindings instead. Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Lee Jones authored
When requesting a channel, a DMA client needs to pass some pieces of information such as; request channel, device type, channel type and direction etc. Normally we do this in the form of platform data, but when DT is enabled we need to pass it using the driver's bindings instead. Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Lee Jones authored
The new DMA is now available, so let's use it to setup ST-Ericsson's DMA40 driver when Device Tree is enabled. Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Lee Jones authored
The DMA40 controller uses two sets of base addresses. In order to have the resources setup by the of_platform framework so they are searchable by name instead of index, we have to set names for them. The names have to be the same as the ones used to fetch them back out of the resource structure. Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Fabio Baltieri authored
Ux500 regulator name for V-INTCORE is misspelled as vinitcore instead of vintcore in some .dts file, causing the AB8500 regulator driver to not bind properly. Fix this by replacing all occurrences with the right name. Acked-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Fabio Baltieri <fabio.baltieri@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Gabriel Fernandez authored
This root node is used in the whole family of chips, the a9500 is just one particular instance. Nodes should be named after the type of object rather than identity. Acked-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Gabriel Fernandez <gabriel.fernandez@stericsson.com> Reviewed-by: Philippe Langlais <philippe.langlais@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Lee Jones authored
Until recently platform code took care of all MMCI level-shifting by way of an ios_handler() call-back. Now it is the driver's responsibility to handle. In order to so that we need to provide the VQMMC regulator reference in Device Tree. This patch takes care of that. Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Lee Jones authored
If we attempt to use the existing u8500 of_dev_auxdata struct to boot the u8540, we fail to obtain a console, due to a lack of DMA support on the platform. Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Lee Jones authored
When the thermal DT node was inserted a new PRCMU node was created; however, one already exists in the Snowball DTS file. Here we amalgamate the two into a single consolidated node. Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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- May 24, 2013
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Josh Wu authored
Signed-off-by: Josh Wu <josh.wu@atmel.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Ludovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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Boris BREZILLON authored
The PA24 pin is wrongly assigned to peripheral B. In the current config there is 2 ETX3 pins (PA11 and PA24) and no ETXER pin (PA22). Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: stable <stable@vger.kernel.org> # 3.8+
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Jean-Christophe PLAGNIOL-VILLARD authored
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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- May 23, 2013
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Will Deacon authored
Commit d3f79584 ("ARM: cleanup undefined instruction entry code") improved the register scheduling when handling undefined instructions. A side effect of this is that r5 is now used as a temporary, whilst the VFP probing code relies on r5 containing a non-zero value when VFP is not supported. This patch fixes the VFP detection code so that we don't rely on the contents of r5. Without this patch, Linux dies loudly on CPUs without VFP support. Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Steven Capper authored
If one reads /proc/$PID/smaps, the mmap_sem belonging to the address space of the task being examined is locked for reading. All the pages of the vmas belonging to the task's address space are then walked with this lock held. If a gate_vma is present in the architecture, it too is examined by the fs/proc/task_mmu.c code. As gate_vma doesn't belong to the address space of the task though, its pages are not walked. A recent cleanup (commit f6604efe ) of the gate_vma initialisation code set the vm_mm value to &init_mm. Unfortunately a non-NULL vm_mm value in the gate_vma will cause the task_mmu code to attempt to walk the pages of the gate_vma (with no mmap-sem lock held). If one enables Transparent Huge Page support and vm debugging, this will then cause OOPses as pmd_trans_huge_lock is called without mmap_sem being locked. This patch removes the .vm_mm value from gate_vma, restoring the original behaviour of the task_mmu code. Signed-off-by: Steve Capper <steve.capper@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Ard Biesheuvel authored
Make the SHA1 asm code ABI conformant by making sure all stack accesses occur above the stack pointer. Origin: http://git.openssl.org/gitweb/?p=openssl.git;a=commit;h=1a9d60d2 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Acked-by: Nicolas Pitre <nico@linaro.org> Cc: stable@vger.kernel.org Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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- May 22, 2013
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Simon Horman authored
This patch updates the marzen board code as if USB PHY isn't enabled they phy will have a value set by ERR_PTR() rather than be NULL. Without this patch a NULL pointer dereference and kernel panic occurs on initialisation of USB on marzen. This resolves a regression introduced in 3.10-rc1 by b7fa5c2a ("usb: phy: return -ENXIO when PHY layer isn't enabled"). Tested-by: Nguyen Hong Ky <nh-ky@jinso.co.jp> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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- May 21, 2013
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Stephen Boyd authored
Before f7b861b7 ("arm: Use generic idle loop") ARM would kill the CPU within the rcu idle section. Now that the rcu_idle_enter()/exit() pair have been pushed lower down in the idle loop this is no longer true and so using RCU_NONIDLE here is no longer necessary and also harmful because RCU is not actually idle at this point. Cc: Russell King <linux@arm.linux.org.uk> Acked-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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Alexandre Courbot authored
The AK8975 Kconfig option was renamed during the 3.10 merge window. Adjust tegra_defconfig to enable the new name, so it's not missing useful features. Tegra DRM support used to be enabled in the default Tegra configuration, but it now depends on CONFIG_TEGRA_HOST1X which is disabled by default. Enable CONFIG_TEGRA_HOST1X so that DRM support is compiled in again. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> [swarren, squashed Alex's and my changes together] Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
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Linus Walleij authored
The assignment of IRQ for the SMC91x ethernet adapter had two problems making it non-working: - It was not put into the ethernet device node. Let's do this by using the board-specific overlay, so we can make other overlays on other Nomadik boards. - The IRQ number was actually completely wrong, this was the number for NHK8815, not S8815. After this ethernet starts working on the USB S8815. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Olof Johansson <olof@lixom.net>
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Srinivas Kandagatla authored
When I tried booting a stih415 Dual core A9 with multi_v7_defconfig, it failed to boot. The issues seems to be changing by enabling or disabling VT8550 platform. Having a quick look at dt_compat list, it seems to miss a NULL terminator, which means of_flat_dt_match will compat check will cross the boundary of dt_compat and fault at some point , which is what was happening in my case. Without this patch if we try to boot multi_v7_defconfig you might notice that some of the platforms might fault if they fall after vt8500 in machine-desc list. Other platforms which fall before vt8500 in mdesc list will not fault. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com> Acked-by: Tony Prisk <linux@prisktech.co.nz> Signed-off-by: Olof Johansson <olof@lixom.net>
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Gregory CLEMENT authored
During the conversion to the internal-regs' subnode, the L2-cache node haven not been converted (due to a wrong choice made by myself during the resolution of the merge conflict when I rebased the commit). This leads to wrong address for L2 cache which prevent it to be used on Armada 370. This commit fix the address reg of the e L2-cache node. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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Gregory CLEMENT authored
When platform data were moved from arch/arm/mach-mv78xx0/common.c to arch/arm/plat-orion/common.c with the commit "7e3819d8 ARM: orion: Consolidate ethernet platform data", there were few typo made on gigabit Ethernet interface ge10 and ge11. This commit writes back their initial value, which allows to use this interfaces again. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Acked-by: Andrew Lunn <andrew@lunn.ch> Cc: <stable@vger.kernel.org> # v3.0.x Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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- May 20, 2013
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Santosh Shilimkar authored
With the OMAP serial driver sysc cleanup patches in this series, we can now remove the hwmod external apis for sysc fiddling. While at this, also remove unused sysc auto idle api from hwmod code. Tested-by: Vaibhav Bedia <vaibhav.bedia@ti.com> Tested-by: Sourav Poddar <sourav.poddar@ti.com> Signed-off-by: Rajendra nayak <rnayak@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@linaro.org> Tested-by: Kevin Hilman <khilman@linaro.org> # OMAP4/Panda Signed-off-by: Paul Walmsley <paul@pwsan.com>
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Santosh Shilimkar authored
UART IP idle handling now taken care by runtime pm backend(hwmod) indirectly and OMAP serial driver is also cleaned up accordingly. So remove the un-used slave idle platforms hooks now. Tested-by: Vaibhav Bedia <vaibhav.bedia@ti.com> Tested-by: Sourav Poddar <sourav.poddar@ti.com> Signed-off-by: Rajendra nayak <rnayak@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@linaro.org> Tested-by: Kevin Hilman <khilman@linaro.org> # OMAP4/Panda Signed-off-by: Paul Walmsley <paul@pwsan.com>
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Santosh Shilimkar authored
OMAP UART IP needs software control for slave idle modes based on functional state of the IP. i.e The IP slave idle settings should be set to 'noidle' when being used and then put back to 'smart_idle' when unused. Currently this is handled by the driver with function pointers implemented in platform code. This however breaks in case of device tree because of missing idle handling APIs. Previous patches in this series added a flag HWMOD_SWSUP_SIDLE_ACTIVE which takes care of the mentioned requirement. Hence add the flag for all UART IPs to take advantage of feature supported by framework. Subsequent patches removes the slave idle handling from driver code. Tested-by: Vaibhav Bedia <vaibhav.bedia@ti.com> Tested-by: Sourav Poddar <sourav.poddar@ti.com> Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@linaro.org> Tested-by: Kevin Hilman <khilman@linaro.org> # OMAP4/Panda Signed-off-by: Paul Walmsley <paul@pwsan.com>
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Rajendra Nayak authored
Some IPs (like UART) need the sidle mode to be controlled in SW only while they are active. Once they go inactive, they need the IP to be put back in HW control so they are also wakeup capable. The flag HWMOD_SWSUP_SIDLE takes care of IPs which need the sidle mode to be *always* controlled in SWSUP. We now have a need to control IPs sidle mode in SWSUP only while its active. So define a new flag 'HWMOD_SWSUP_SIDLE_ACT' to help the framework know about these new IP requirements. Tested-by: Vaibhav Bedia <vaibhav.bedia@ti.com> Tested-by: Sourav Poddar <sourav.poddar@ti.com> Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@linaro.org> Tested-by: Kevin Hilman <khilman@linaro.org> # OMAP4/Panda Signed-off-by: Paul Walmsley <paul@pwsan.com>
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Rajendra Nayak authored
_enable_sysc() and _idle_sysc() handle the midle mode programming correctly and program HWMOD_IDLEMODE_SMART or HWMOD_IDLEMODE_SMART_WKUP respectively for supported IPs (The ones which support hardware controlled midle modes) However the same programming logic is missing when it comes to sidle mode programming. Here they seem to just set HWMOD_IDLEMODE_SMART (Again for the ones which support hardware controlled sidle modes) This problem was hidden due to the fact that a call to _enable_wakeup() in those same functions would overwrite the idlemodes and program them correctly (to HWMOD_IDLEMODE_SMART_WKUP in the supported cases) So fix the sidlemode handling correctly in these functions and handle the _enable_wakeup() for SIDLEMODE supported IPs same as the way its handled for MIDLEMODE supported ones. Tested-by: Vaibhav Bedia <vaibhav.bedia@ti.com> Tested-by: Sourav Poddar <sourav.poddar@ti.com> Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@linaro.org> Tested-by: Kevin Hilman <khilman@linaro.org> # OMAP4/Panda Signed-off-by: Paul Walmsley <paul@pwsan.com>
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Thomas Petazzoni authored
Since 82a68267 ('ARM: dts: mvebu: Convert all the mvebu files to use the range property') all the device nodes of Armada 370/XP are under a common 'ranges' property that translates the device register addresses into their absolute address, thanks to the base address of the internal register space. However, beyond just the register areas, there are also PCIe I/O and memory regions, whose addresses should be properly translated. This patch fixes the Armada 370 and XP ranges property to take PCIe into account properly. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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Gregory CLEMENT authored
Initially ARCH_REQUIRE_GPIOLIB was part of Thomas Petazzoni series when he introduced the gpiolib support for mvebu: 93a59cf3 arm: mvebu: use GPIO support now that a driver is available This commit was written to be applied for the ARCH_MVEBU which was located in arch/arm/KConfig and was merged in 3.7. In the same time Rob Herring moved the ARCH_MVEBU block to arch/arm/mach-mvebu/Kconfig with this commit and also merged in 3.7: 387798b3 ARM: initial multiplatform support Unfortunately the ARCH_REQUIRE_GPIOLIB have been lost during this migration. This was not noticed until the v3.10-rc1, because mvebu as part of ARCH_MULTIPLATFORM was always selected with ARCH_VEXPRESS, and this architect selected ARCH_REQUIRE_GPIOLIB. Since the following commit from Arnd: "883a106b ARM: default machine descriptor for multiplatform", ARCH_VEXPRESS was then no more selected by default with ARCH_MVEBU and it made appeared the lack of ARCH_REQUIRE_GPIOLIB for mvebu. This commit added back the selection of ARCH_REQUIRE_GPIOLIB for ARCH_MVEBU. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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- May 18, 2013
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Wolfram Sang authored
devm_ioremap_resource does sanity checks on the given resource. No need to duplicate this in the driver. Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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Wolfram Sang authored
devm_ioremap_resource does sanity checks on the given resource. No need to duplicate this in the driver. Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Acked-by: Stephen Warren <swarren@nvidia.com>
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Vaibhav Hiremath authored
It is required to enable respective clock-domain before enabling any clock/module inside that clock-domain. During common-clock migration, .clkdm_name field got missed for "clkdiv32k_ick" clock, which leaves "clk_24mhz_clkdm" unused; so it will be disabled even if childs of this clock-domain is enabled, which keeps child modules in idle mode. This fixes the kernel crash observed on AM335xEVM-SK platform, where clkdiv32_ick clock is being used as a gpio debounce clock and since clkdiv32k_ick is in idle mode it leads to below crash - Crash Log: ========== [ 2.598347] Unhandled fault: external abort on non-linefetch (0x1028) at 0xfa1ac150 [ 2.606434] Internal error: : 1028 [#1] SMP ARM [ 2.611207] Modules linked in: [ 2.614449] CPU: 0 Not tainted (3.8.4-01382-g1f449cd-dirty #4) [ 2.620973] PC is at _set_gpio_debounce+0x60/0x104 [ 2.626025] LR is at clk_enable+0x30/0x3c Cc: stable@vger.kernel.org # v3.9 Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> Cc: Rajendra Nayak <rnayak@ti.com> Acked-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Ezequiel Garcia authored
With the latest device tree reorganization which introduced the 'internal-reg' node, now the only region translated is the internal register's. This makes the description of the hardware incomplete, for it lacks the Device Bus childs address space. In order to fix this, it's required to add a 'ranges' entry with a suitable address space to map Device Bus childs, on a per-board basis. This patch fixes the ranges property on the Armada XP GP board. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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- May 17, 2013
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Paul Walmsley authored
omap2plus_defconfig is missing CONFIG_ARCH_MULTI_V6. This results in undefined instruction traps in u-boot (and boot failures) on OMAP2xxx SoCs, which are ARM11-based. Fix by setting CONFIG_ARCH_MULTI_V6. Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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Wei Yongjun authored
Fix to return -ENOMEM in the d->chan alloc error handling case instead of 0, as done elsewhere in this function. Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Signed-off-by: Tony Lindgren <tony@atomide.com>
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