- May 27, 2013
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Linus Walleij authored
This makes sure the new ccu8540 DTB file is generated by the build system. Cc: Lee Jones <lee.jones@linaro.org> Cc: Gabriel Fernandez <gabriel.fernandez.st@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Lee Jones authored
The PRCMU's Tightly Coupled Data Memory on the DB8540 platform is 8kB larger than it's predecessor's. We need to reflect that in its Device Tree. By re-specifying the address and size of the device we effectively over-ride the previous values with more accurate ones. Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Lee Jones authored
This is a skeleton DTS file which only enables serial. Just using this simple file yields a terminal when booting u8540. Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Lee Jones authored
It's now possible to configure memcpy channels dynamically with DT. We're providing them despite the fact that they're the same as the hard-coded channels, as they will be removed once the u8500 platform goes DT-only. Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Lee Jones authored
This patch provides all the information to successfully probe() and correctly configure the ux500-musb device driver for DMA. Acked-by: Fabio Baltieri <fabio.baltieri@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Lee Jones authored
When requesting a channel, a DMA client needs to pass some pieces of information such as; request channel, device type, channel type and direction etc. Normally we do this in the form of platform data, but when DT is enabled we need to pass it using the driver's bindings instead. Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Lee Jones authored
When requesting a channel, a DMA client needs to pass some pieces of information such as; request channel, device type, channel type and direction etc. Normally we do this in the form of platform data, but when DT is enabled we need to pass it using the driver's bindings instead. Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Lee Jones authored
The new DMA is now available, so let's use it to setup ST-Ericsson's DMA40 driver when Device Tree is enabled. Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Lee Jones authored
The DMA40 controller uses two sets of base addresses. In order to have the resources setup by the of_platform framework so they are searchable by name instead of index, we have to set names for them. The names have to be the same as the ones used to fetch them back out of the resource structure. Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Fabio Baltieri authored
Ux500 regulator name for V-INTCORE is misspelled as vinitcore instead of vintcore in some .dts file, causing the AB8500 regulator driver to not bind properly. Fix this by replacing all occurrences with the right name. Acked-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Fabio Baltieri <fabio.baltieri@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Gabriel Fernandez authored
This root node is used in the whole family of chips, the a9500 is just one particular instance. Nodes should be named after the type of object rather than identity. Acked-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Gabriel Fernandez <gabriel.fernandez@stericsson.com> Reviewed-by: Philippe Langlais <philippe.langlais@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Lee Jones authored
Until recently platform code took care of all MMCI level-shifting by way of an ios_handler() call-back. Now it is the driver's responsibility to handle. In order to so that we need to provide the VQMMC regulator reference in Device Tree. This patch takes care of that. Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Lee Jones authored
If we attempt to use the existing u8500 of_dev_auxdata struct to boot the u8540, we fail to obtain a console, due to a lack of DMA support on the platform. Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Lee Jones authored
When the thermal DT node was inserted a new PRCMU node was created; however, one already exists in the Snowball DTS file. Here we amalgamate the two into a single consolidated node. Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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- May 26, 2013
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Kyle McMartin authored
kcore_vmalloc is in fs/proc/kcore.c and kcore_mem is unused across the tree. Noticed while grepping the tree for some other kcore stuff. (score looks pretty unmaintained to me.) Signed-off-by: Kyle McMartin <kyle@redhat.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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- May 25, 2013
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Vineet Gupta authored
gdbserver inserting a breakpoint ends up calling copy_user_page() for a code page. The generic version of which (non-aliasing config) didn't set the PG_arch_1 bit hence update_mmu_cache() didn't sync dcache/icache for corresponding dynamic loader code page - causing garbade to be executed. So now aliasing versions of copy_user_highpage()/clear_page() are made default. There is no significant overhead since all of special alias handling code is compiled out for non-aliasing build Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
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Helge Deller authored
The logic to detect if the irq stack was already in use with raw_spin_trylock() is wrong, because it will generate a "trylock failure on UP" error message with CONFIG_SMP=n and CONFIG_DEBUG_SPINLOCK=y. arch_spin_trylock() can't be used either since in the CONFIG_SMP=n case no atomic protection is given and we are reentrant here. A mutex didn't worked either and brings more overhead by turning off interrupts. So, let's use the fastest path for parisc which is the ldcw instruction. Counting how often the irq stack was used is pretty useless, so just drop this piece of code. Signed-off-by: Helge Deller <deller@gmx.de>
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John David Anglin authored
The get_stack_use_cr30 and get_stack_use_r30 macros allocate a stack frame for external interrupts and interruptions requiring a stack frame. They are currently not reentrant in that they save register context before the stack is set or adjusted. I have observed a number of system crashes where there was clear evidence of stack corruption during interrupt processing, and as a result register corruption. Some interruptions can still occur during interruption processing, however external interrupts are disabled and data TLB misses don't occur for absolute accesses. So, it's not entirely clear what triggers this issue. Also, if an interruption occurs when Q=0, it is generally not possible to recover as the shadowed registers are not copied. The attached patch reworks the get_stack_use_cr30 and get_stack_use_r30 macros to allocate stack before doing register saves. The new code is a couple of instructions shorter than the old implementation. Thus, it's an improvement even if it doesn't fully resolve the stack corruption issue. Based on limited testing, it improves SMP system stability. Signed-off-by: John David Anglin <dave.anglin@bell.net> Signed-off-by: Helge Deller <deller@gmx.de>
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Helge Deller authored
Show number of floating point assistant and unaligned access fixup handler in /proc/interrupts file. Signed-off-by: Helge Deller <deller@gmx.de>
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Helge Deller authored
additionally clean up some whitespaces & tabs. Signed-off-by: Helge Deller <deller@gmx.de>
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Helge Deller authored
Signed-off-by: Helge Deller <deller@gmx.de>
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- May 24, 2013
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Josh Wu authored
Signed-off-by: Josh Wu <josh.wu@atmel.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Ludovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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Boris BREZILLON authored
The PA24 pin is wrongly assigned to peripheral B. In the current config there is 2 ETX3 pins (PA11 and PA24) and no ETXER pin (PA22). Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: stable <stable@vger.kernel.org> # 3.8+
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Jean-Christophe PLAGNIOL-VILLARD authored
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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Brian King authored
Recent commit e61133dd added support for a new firmware feature to force an adapter to use 32 bit MSIs. However, this firmware is not available for all systems. The hack below allows devices needing 32 bit MSIs to work on these systems as well. It is careful to only enable this on Gen2 slots, which should limit this to configurations where this hack is needed and tested to work. [Small change to factor out the hack into a separate function -- BenH] Signed-off-by: Brian King <brking@linux.vnet.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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Benjamin Herrenschmidt authored
The zImage.epapr wrapper allows to use zImages when booting via a flat device-tree which can be used on powernv. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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Benjamin Herrenschmidt authored
This moves the quirk itself to pci_64.c as to get built on all ppc64 platforms (the only ones with a pci_dn), factors the two implementations of get_pdn() into a single pci_get_dn() and use the quirk to do 32-bit MSIs on IODA based powernv platforms. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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Michael Ellerman authored
In commit 9353374b "Context switch the new EBB SPRs" we added support for context switching some new EBB SPRs. However despite four of us signing off on that patch we missed some. To be fair these are not actually new SPRs, but they are now potentially user accessible so need to be context switched. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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Benjamin Herrenschmidt authored
We use two flags, one to indicate an invalidation is needed after creating a new entry and one to indicate an invalidation is needed after removing an entry. However we were testing the wrong flag in the remove case. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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Benjamin Herrenschmidt authored
The message is only meant to be displayed if resource 0 is empty, but was displayed if any is. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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Benjamin Herrenschmidt authored
The TLB has 512 congruence classes (2048 entries 4 way set associative) while P7 had 128 Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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- May 23, 2013
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Vineet Gupta authored
The current code uses 2 bits for determining page's dcache color, thus sorting pages into 4 bins, whereas the aliasing dcache really has 2 bins (8k page, 64k dcache - 4 way-set-assoc). This can cause extraneous flushes - e.g. color 0 and 2. Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
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Vineet Gupta authored
The VM_EXEC check in update_mmu_cache() was getting optimized away because of a stupid error in definition of macro addr_not_cache_congruent() The intention was to have the equivalent of following: if (a || (1 ? b : 0)) but we ended up with following: if (a || 1 ? b : 0) And because precedence of '||' is more that that of '?', gcc was optimizing away evaluation of <a> Nasty Repercussions: 1. For non-aliasing configs it would mean some extraneous dcache flushes for non-code pages if U/K mappings were not congruent. 2. For aliasing config, some needed dcache flush for code pages might be missed if U/K mappings were congruent. Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
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Vineet Gupta authored
This manifested as grep failing psuedo-randomly: -------------->8--------------------- [ARCLinux]$ ip address show lo | grep inet [ARCLinux]$ ip address show lo | grep inet [ARCLinux]$ ip address show lo | grep inet [ARCLinux]$ [ARCLinux]$ ip address show lo | grep inet inet 127.0.0.1/8 scope host lo -------------->8--------------------- ARC700 MMU provides fully orthogonal permission bits per page: Ur, Uw, Ux, Kr, Kw, Kx The user mode page permission templates used to have all Kernel mode access bits enabled. This caused a tricky race condition observed with uClibc buffered file read and UNIX pipes. 1. Read access to an anon mapped page in libc .bss: write-protected zero_page mapped: TLB Entry installed with Ur + K[rwx] 2. grep calls libc:getc() -> buffered read layer calls read(2) with the internal read buffer in same .bss page. The read() call is on STDIN which has been redirected to a pipe. read(2) => sys_read() => pipe_read() => copy_to_user() 3. Since page has Kernel-write permission (despite being user-mode write-protected), copy_to_user() suceeds w/o taking a MMU TLB-Miss Exception (page-fault for ARC). core-MM is unaware that kernel erroneously wrote to the reserved read-only zero-page (BUG #1) 4. Control returns to userspace which now does a write to same .bss page Since Linux MM is not aware that page has been modified by kernel, it simply reassigns a new writable zero-init page to mapping, loosing the prior write by kernel - effectively zero'ing out the libc read buffer under the hood - hence grep doesn't see right data (BUG #2) The fix is to make all kernel-mode access permissions mirror the user-mode ones. Note that the kernel still has full access to pages, when accessed directly (w/o MMU) - this fix ensures that kernel-mode access in copy_to_from() path uses the same faulting access model as for pure user accesses to keep MM fully aware of page state. The issue is peudo-random because it only shows up if the TLB entry installed in #1 is present at the time of #3. If it is evicted out, due to TLB pressure or some-such, then copy_to_user() does take a TLB Miss Exception, with a routine write-to-anon COW processing installing a fresh page for kernel writes and also usable as it is in userspace. Further the issue was dormant for so long as it depends on where the libc internal read buffer (in .bss) is mapped at runtime. If it happens to reside in file-backed data mapping of libc (in the page-aligned slack space trailing the file backed data), loader zero padding the slack space, does the early cow page replacement, setting things up at the very beginning itself. With gcc 4.8 based builds, the libc buffer got pushed out to a real anon mapping which triggers the issue. Reported-by: Anton Kolesov <akolesov@synopsys.com> Cc: <stable@vger.kernel.org> # 3.9 Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
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Vineet Gupta authored
Flush and INVALIDATE the dcache page. This helper is only used for writeback of CODE pages to memory. So there's no value in keeping the dcache lines around. Infact it is risky as a writeback on natural eviction under pressure can cause un-needed writeback with weird issues on aliasing dcache configurations. Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
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Will Deacon authored
Commit d3f79584 ("ARM: cleanup undefined instruction entry code") improved the register scheduling when handling undefined instructions. A side effect of this is that r5 is now used as a temporary, whilst the VFP probing code relies on r5 containing a non-zero value when VFP is not supported. This patch fixes the VFP detection code so that we don't rely on the contents of r5. Without this patch, Linux dies loudly on CPUs without VFP support. Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Steven Capper authored
If one reads /proc/$PID/smaps, the mmap_sem belonging to the address space of the task being examined is locked for reading. All the pages of the vmas belonging to the task's address space are then walked with this lock held. If a gate_vma is present in the architecture, it too is examined by the fs/proc/task_mmu.c code. As gate_vma doesn't belong to the address space of the task though, its pages are not walked. A recent cleanup (commit f6604efe ) of the gate_vma initialisation code set the vm_mm value to &init_mm. Unfortunately a non-NULL vm_mm value in the gate_vma will cause the task_mmu code to attempt to walk the pages of the gate_vma (with no mmap-sem lock held). If one enables Transparent Huge Page support and vm debugging, this will then cause OOPses as pmd_trans_huge_lock is called without mmap_sem being locked. This patch removes the .vm_mm value from gate_vma, restoring the original behaviour of the task_mmu code. Signed-off-by: Steve Capper <steve.capper@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Ard Biesheuvel authored
Make the SHA1 asm code ABI conformant by making sure all stack accesses occur above the stack pointer. Origin: http://git.openssl.org/gitweb/?p=openssl.git;a=commit;h=1a9d60d2 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Acked-by: Nicolas Pitre <nico@linaro.org> Cc: stable@vger.kernel.org Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Jiang Liu authored
As suggested by David Howells <dhowells@redhat.com>, use asm-generic/param.h and uapi/asm-generic/param.h for AVR32. It also fixes building warnings caused by redefinitions of HZ: In file included from /ws/linux/kernel/linux.git/include/uapi/linux/param.h:4, from include/linux/timex.h:63, from include/linux/jiffies.h:8, from include/linux/ktime.h:25, from include/linux/timer.h:5, from include/linux/workqueue.h:8, from include/linux/srcu.h:34, from include/linux/notifier.h:15, from include/linux/memory_hotplug.h:6, from include/linux/mmzone.h:777, from include/linux/gfp.h:4, from arch/avr32/mm/init.c:10: /ws/linux/kernel/linux.git/arch/avr32/include/asm/param.h:6:1: warning: "HZ" redefined In file included from /ws/linux/kernel/linux.git/arch/avr32/include/asm/param.h:4, from /ws/linux/kernel/linux.git/include/uapi/linux/param.h:4, from include/linux/timex.h:63, from include/linux/jiffies.h:8, from include/linux/ktime.h:25, from include/linux/timer.h:5, from include/linux/workqueue.h:8, from include/linux/srcu.h:34, from include/linux/notifier.h:15, from include/linux/memory_hotplug.h:6, from include/linux/mmzone.h:777, from include/linux/gfp.h:4, from arch/avr32/mm/init.c:10: /ws/linux/kernel/linux.git/arch/avr32/include/uapi/asm/param.h:6:1: warning: this is the location of the previous definition Signed-off-by: Jiang Liu <jiang.liu@huawei.com> Cc: Hans-Christian Egtvedt <egtvedt@samfundet.no> Cc: Haavard Skinnemoen <hskinnemoen@gmail.com> Cc: linux-kernel@vger.kernel.org Signed-off-by: Hans-Christian Egtvedt <egtvedt@samfundet.no>
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- May 22, 2013
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Aron Xu authored
As a relatively new ABI, N64 only had getdents syscall while other modern architectures have getdents64. This was noticed when Python 3.3 shifted to the latter one for aarch64. [ralf@linux-mips.org: The history of getdents64 is a little complicated. Commit 1a1d77dd589de5a567fa95e36aa6999c704ceca4 [Merge with 2.4.0-test7.] added N64 getdents(2) to arch/mips64/kernel/scall_64.S as syscall 5213, then dropped again in 578720675c44e54e8aa7c68f6dce59ed37ce3d3b [Overhaul of the 64-bit syscall interface. Now heritage free.] for 2.5.18 in 2002.] Signed-off-by: Aron Xu <aron@debian.org> Acked-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5285/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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