- Oct 10, 2013
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Dinh Nguyen authored
Add support for a new SOCFPGA board that has an Arria V FPGA along with dual ARM Cortex-A9 cores. Signed-off-by: Dinh Nguyen <dinguyen@altera.com> Cc: Pavel Machek <pavel@denx.de> Cc: Rob Herring <rob.herring@calxeda.com> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: devicetree@vger.kernel.org CC: linux-arm-kernel@lists.infradead.org
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Steffen Trumtrar authored
The s2f_* clocks are called h2f_* in the datasheets. Rename them accordingly in the socfpga.dtsi. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
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Steffen Trumtrar authored
Some of the clock nodes and the rst-/sysmgr use wrong indentation. Fix it. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
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Steffen Trumtrar authored
This adds basic support for the terasic SoCkit board. The board includes an Altera Cyclone 5 SoC. [Dinh Nguyen] - Changed to 115200 for baudrate in dts bootargs Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
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Steffen Trumtrar authored
The current socfpga_cyclone5.dts describes the Altera Cyclone5 SoC Development Kit. The Cyclone5 includes a SoCFPGA, which itself can be included in other SoC+FPGA combinations. Instead of having to describe all Cyclone5 common nodes in every board specific dts, move socfpga_cyclone5.dts to a dtsi and include this in a new dts for the Development Kit. [Dinh Nguyen] - Changed to 115200 for baudrate in dts bootargs Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
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- Oct 05, 2013
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Dinh Nguyen authored
Assign a clock for the twd-timer. Signed-off-by: Dinh Nguyen <dinguyen@altera.com> Acked-by: Rob Herring <rob.herring@calxeda.com> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Ian Campbell <ian.campbell@citrix.com> CC: linux-arm-kernel@lists.infradead.org
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- Sep 18, 2013
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Enric Balletbo i Serra authored
Add pinmux configuration for MCBSP2 connected to the TDM interface. With this configuration the Headset modules works as expected. Signed-off-by: Enric Balletbo i Serra <eballetbo@gmail.com> Acked-by: Javier Martinez Canillas <javier@dowhile0.org> Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
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Tony Lindgren authored
Commit 76787b3b (ARM: OMAP2+: Remove board-4430sdp.c) removed legacy booting in favor of device tree based booting for 4430sdp. That caused the WLAN to stop working as the related .dts entries fell through the cracks. I don't have the "1283 PG 2.21 connectivity device" on my 4430sdp, but the earlier version of this patch was tested by Luciano Coelho. This version has left out the input logic for MMC CLK line compared to the earlier version as that is not bidirectional, and should be safe to do. Cc: Rajendra Nayak <rnayak@ti.com> Cc: Luciano Coelho <luca@coelho.fi> Cc: Ruslan Bilovol <ruslan.bilovol@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
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Tony Lindgren authored
Commit b42b9181 (ARM: OMAP2+: Remove board-omap4panda.c) removed legacy booting in favor of device tree based booting for pandaboard. That caused the WLAN to stop working as the related .dts entries fell through the cracks. The legacy muxing was setting pulls for GPIO 48 and 49, so let's keep that behaviour for now to avoid further regressions for BT and FM. Also input logic was enabled for MMC CLK line, but I've verified that the input logic we don't need enabled for CLK line as it's not bidirectional. Also, we want to use non-removable instead of ti,non-removable as the ti,non-removable also sets no_regulator_off_init which is really not what we want as then wl12xx won't get powered up and down which is needed for resetting it. Note that looks like the WLAN interface fails to come up after a warm reset, but that most likely was also happening with the legacy booting and needs a separate fix. Cc: Paolo Pisati <p.pisati@gmail.com> Cc: Rajendra Nayak <rnayak@ti.com> Cc: Luciano Coelho <luca@coelho.fi> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
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- Sep 17, 2013
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Felipe Balbi authored
Fix the DTS data for ocp2scp node by adding the missing reg property. Signed-off-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
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Felipe Balbi authored
USB3 block has a 64KiB space, another 64KiB is used for the wrapper. Without this change, resource_size() will get confused and driver won't probe because size will be negative. Signed-off-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
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Koen Kooi authored
The BeagleBone Black is basically a regular BeagleBone with eMMC and HDMI added, so create a common dtsi both can use. IMPORTANT: booting the existing am335x-bone.dts will blow up the HDMI transceiver after a dozen boots with an uSD card inserted because LDO will be at 3.3V instead of 1.8. MMC support for AM335x still isn't in, so only the LDO change has been added. Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> Tested-by: Tom Rini <trini@ti.com> Tested-by: Matt Porter <matt.porter@linaro.org> Acked-by: Kevin Hilman <khilman@linaro.org> Tested-by: Kevin Hilman <khilman@linaro.org> Tested-by: Joel Fernandes <joelf@ti.com> Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
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Robert Nelson authored
The beagle and beagle-xm entries were inside the same double quote. Split them to have two distinct entries. Signed-off-by: Robert Nelson <robertcnelson@gmail.com> Signed-off-by: Benoit Cousson <bcousson@baylibre.com>
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Huang Shijie authored
The patch "0b7a76aa ARM: dts: imx6q{dl}: add DTE pads for uart" adds the DTE pads for uart. For PAD_EIM_D29, the offset of the Pad Mux register should be 0x0c8, not 0x0c4. This patch fixes it. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Arnaud Patard authored
Commit 718a3500 (ARM: i.MX51: Add PATA support) adds pata support to the imx51.dtsi file and is using clock 161. The problem is that the right clock is 172, according to commit 5d530bb0 (ARM: i.MX5: Add PATA and SRTC clocks). Using the clock 172 makes things work again (and kills a nasty system freeze). Tested-by: Steev Klimaszewski <steev@gentoo.org> Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Gwenhael Goavec-Merou authored
CSPI PER clock is per2clk (per2_gate id 60) instead of cspiX_ipg_gate. Signed-off-by: Gwenhael Goavec-Merou <gwenhael.goavec-merou@armadeus.com> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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- Sep 13, 2013
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Maxime Ripard authored
The A20-olinuxino-micro has the EMAC wired in. Enable it in the DT so that we can use it. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Olof Johansson <olof@lixom.net>
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Maxime Ripard authored
The Cubieboard2, just like its A10 counterpart, has the Ethernet wired in. Enable it in the DT. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Olof Johansson <olof@lixom.net>
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Maxime Ripard authored
The A20 has several muxing options for the EMAC. Yet, the currently supported boards only use one set of them. Add that pin set to the DTSI. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Olof Johansson <olof@lixom.net>
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Maxime Ripard authored
The Allwinner A20 SoC also have the EMAC found on the A10 and A10s. Enable the support for it in the DTSI. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Olof Johansson <olof@lixom.net>
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- Sep 07, 2013
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Tomasz Figa authored
Since pwm-samsung bindings require at least one clock to be specified, this patch adds the missing clocks and clock-names properties to specify clocks used by PWM block on Exynos4 SoCs. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
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- Sep 03, 2013
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Laurent Pinchart authored
Replace the numerical polarity flags with the PWM_POLARITY_INVERTED symbolic constant. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
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- Aug 31, 2013
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Jon Medhurst (Tixy) authored
The Versatile Express V2P-CA15_A7 (aka TC2) has a CCI-400 which is needed to get Multi-Cluster Power Management (MCPM) working. Signed-off-by: Jon Medhurst <tixy@linaro.org> Acked-by: Pawel Moll <pawel.moll@arm.com> Acked-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Olof Johansson <olof@lixom.net>
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- Aug 30, 2013
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Dinh Nguyen authored
"dw-apb-timer-osc" and "dw-apb-timer-sp" are the same implementation of the DW APB timer, just fed by different clocks. Thus, deprecate both "dw-apb-timer-osc" and "dw-apb-timer-sp" in lieu of "dw-apb-timer". Signed-off-by: Dinh Nguyen <dinguyen@altera.com> Reviewed-by: Pavel Machek <pavel@denx.de> Acked-by: Stephen Warren <swarren@wwwdotorg.org> CC: Rob Herring <rob.herring@calxeda.com> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Ian Campbell <ian.campbell@citrix.com> CC: Arnd Bergmann <arnd@arndb.de> Cc: Olof Johansson <olof@lixom.net> CC: Jamie Iles <jamie@jamieiles.com> Cc: John Stultz <john.stultz@linaro.org> Cc: Heiko Stuebner <heiko@sntech.de> Cc: Pavel Machek <pavel@denx.de> Cc: devicetree@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Olof Johansson <olof@lixom.net> v3: - Split out a separate that cleans up the timer entries and clock information. - Clearly states which binding is deprecated in the bindings doc. v2: - Deprecate the "dw-apb-timer-osc" and "dw-apb-timer-sp" but maintain backwards compatibility in the driver.
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Boris BREZILLON authored
Fix phy0 address to match the reg property defined in phy0 node. Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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- Aug 29, 2013
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Stephen Boyd authored
Let's follow the ratified DT binding and use uartdm instead of hsuart. This does break backwards compatibility but this shouldn't be a problem because the uart driver isn't probing on these devices without adding clock support (which isn't merged so far). Cc: David Brown <davidb@codeaurora.org> Acked-by: Kumar Gala <galak@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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- Aug 28, 2013
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Sebastian Andrzej Siewior authored
So I assumed that Beagle bone has only one USB port in host mode because the micro USB connector had an USB-UART there. I was wrong a little. The second port runs on host mode, but the micro USB plug is connected to an internal HUB with two ports: one to the USB-UART and one to musb instance one. For that reason, this patch enables both ports: the primary in device mode only and the second in host mode only. Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Felipe Balbi <balbi@ti.com>
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Sebastian Andrzej Siewior authored
This is what I observe: On the first connect, the musb starts with DEVCTL.Session set. On disconnect, musb_core calls try_idle. That functions removes the Session bit signalizing that the session is over (something that only in OTG is required). A new device, that is plugged, is no longer recognized. I've setup a timer and checked the DEVCTL register and I haven't seen a change in VBus and I saw the B-Device bit set. After setting the IDDIG into A mode and forcing the device to behave like a A device, I didn't see a change. Neither VBUS goes to 0b11 nor does a session start request comes. In the TI-v3.2 kernel they skip to call musb_platform_try_idle() in the OTG_STATE_A_WAIT_BCON state while not in OTG mode. Since the second port hast a standard A plug the patch changes the port to run in host mode only and skips the timer which would remove DEVCTL.Session so we can reconnect to another device later. Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Felipe Balbi <balbi@ti.com>
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Sebastian Andrzej Siewior authored
This relfects the code and dts requires changes due to recent .dts binding updates: - use mg prefix for the Metor Graphics specific attributes - use power in mA not in mA/2 as specifed in the USB2.0 specification - remove the child node for USB. This is driver specific on won't be reflected in the device tree - use the "mentor" prefix instead of "mg". - use "dr_mode" istead of "mg,port-mode" for the port mode. The former is used by a few other drivers. Cc: Rob Herring <rob.herring@calxeda.com> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Ian Campbell <ian.campbell@citrix.com> Cc: devicetree@vger.kernel.org Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Felipe Balbi <balbi@ti.com>
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Sebastian Andrzej Siewior authored
I forgot to separete the different names in the reg-names property. This didn't cause anything to fail because the driver does not use the names and simply relies on the order of the memory offsets in reg. This patch fixes this in case it is used later. Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Felipe Balbi <balbi@ti.com>
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- Aug 27, 2013
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Boris BREZILLON authored
This patch describe the phy used on atmel sama5d3 mother board: - phy address - phy interrupt pin Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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- Aug 26, 2013
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Maxime Ripard authored
Now that the clock driver knows about the available clocks found on the A20, we can build up the clock tree from the device tree. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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Maxime Ripard authored
Now that the clock driver has support for the A31 clocks, we can add them to the DTSI and start using them in the relevant hardware blocks. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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Maxime Ripard authored
The A10s has only a subset of the A10 gates. Now that the clock driver has support for this gates set, switch to it in the DTSI. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Tested-by: Emilio López <emilio@elopez.com.ar>
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Naveen Krishna Chatradhi authored
Add ADC device tree node for exynos5420 and exynos5250 Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com> Signed-off-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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Vikas Sajjan authored
Adds RTC DT node to Exynos5420 SoC Signed-off-by: Vikas Sajjan <vikas.sajjan@linaro.org> Reviewed-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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Vikas Sajjan authored
Moves the RTC DT node's "status" property from exynos5250 board (arndale & snow) dts files to exynos5250.dtsi, since the bindings in exynos5250.dtsi depicts the RTC h/w completely. Signed-off-by: Vikas Sajjan <vikas.sajjan@linaro.org> Reviewed-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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Vikas Sajjan authored
Fixes the RTC DT node name for Exynos5250 as per the DT node naming convention. Signed-off-by: Vikas Sajjan <vikas.sajjan@linaro.org> Reviewed-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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- Aug 23, 2013
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Qipan Li authored
the old codes defined uart0_nostreamctrl_pins, but missed pingroup and padmux definition for it. this patch fixes it. Signed-off-by: Qipan Li <Qipan.Li@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Josh Wu authored
Signed-off-by: Josh Wu <josh.wu@atmel.com>
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