clk: tegra: Register clocks from root to leaf
Current clock initialization causes intermediate registering of orphan clocks (i.e. a clock without a parent registered). CCF keeps track of orphan clocks and any time a new clock is registered, it will loop through the list of orphan and queries if the parent is now available. This operation triggers one or more clock operations, which are IPCs with BPMP-FW. Hence, due to the order in which the clocks appear currently, this causes > 5000 IPC messages to be sent to BPMP-FW during clock initialization. Optimize the clock probing by registering clocks hierarchically from root clock towards leafs. Signed-off-by:Timo Alho <talho@nvidia.com> [jonathanh@nvidia.com: checkpatch fixes] Signed-off-by:
Jon Hunter <jonathanh@nvidia.com> Signed-off-by:
Thierry Reding <treding@nvidia.com>
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