HSD #15012986938: net: stmmac: Use interrupt mode INTM=1 for per channel irq

commit dbe45cd8b4519ded14eda0294718ed7666bf17e0 from
https://github.com/altera-opensource/linux-socfpga.git



commit 6ccf12ae ("net: stmmac: use interrupt mode INTM=1
for multi-MSI") is introduced for platform that uses MSI.

Similar approach is taken to enable per channel interrupt
that uses shared peripheral interrupt (SPI), so only per channel
TX and RX intr (TI/RI) are handled by TX/RX ISR without calling
common interrupt ISR.

TX/RX NORMAL interrupts check is now decoupled, since NIS bit
is not asserted for any TI/RI events when INTM=1.

Signed-off-by: Teoh Ji Sheng <ji.sheng.teoh@intel.com>
Signed-off-by: Liwei Song <liwei.song@windriver.com>