HSD #15012986938: net: stmmac: Add support for TX/RX channel interrupt

commit 38d5e16b44df26500928debe8c9cab87c7e5596f from
https://github.com/altera-opensource/linux-socfpga.git



Enable TX/RX channel interrupt registration for MAC that interrupts CPU
through shared peripheral interrupt (SPI).

Per channel interrupt support is enabled through device tree property:
"snps,multi-irq-en"

Per channel interrupts and interrupt-names are registered through,
Eg: 4 tx and 4 rx channels:
interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
	     <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
             <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
             <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
             <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
             <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
             <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
             <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "macirq_tx0",
		  "macirq_tx1",
                  "macirq_tx2",
                  "macirq_tx3",
                  "macirq_rx0",
                  "macirq_rx1",
                  "macirq_rx2",
                  "macirq_rx3";

Signed-off-by: Teoh Ji Sheng <ji.sheng.teoh@intel.com>
Signed-off-by: Liwei Song <liwei.song@windriver.com>