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  1. Jan 07, 2022
  2. Jan 06, 2022
  3. Jan 05, 2022
    • David S. Miller's avatar
      Merge branch 'dsa-notifier-cleanup' · c487b653
      David S. Miller authored
      
      
      Vladimir Oltean says:
      
      ====================
      DSA cross-chip notifier cleanup
      
      This series deletes the no-op cross-chip notifier support for MRP and
      HSR, features which were introduced relatively recently and did not get
      full review at the time. The new code is functionally equivalent, but
      simpler.
      
      Cc: Horatiu Vultur <horatiu.vultur@microchip.com>
      Cc: George McCollister <george.mccollister@gmail.com>
      ====================
      
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      c487b653
    • Vladimir Oltean's avatar
      net: dsa: remove cross-chip support for HSR · a68dc7b9
      Vladimir Oltean authored
      
      
      The cross-chip notifiers for HSR are bypass operations, meaning that
      even though all switches in a tree are notified, only the switch
      specified in the info structure is targeted.
      
      We can eliminate the unnecessary complexity by deleting the cross-chip
      notifier logic and calling the ds->ops straight from port.c.
      
      Cc: George McCollister <george.mccollister@gmail.com>
      Signed-off-by: default avatarVladimir Oltean <vladimir.oltean@nxp.com>
      Reviewed-by: default avatarGeorge McCollister <george.mccollister@gmail.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      a68dc7b9
    • Vladimir Oltean's avatar
      net: dsa: remove cross-chip support for MRP · cad69019
      Vladimir Oltean authored
      
      
      The cross-chip notifiers for MRP are bypass operations, meaning that
      even though all switches in a tree are notified, only the switch
      specified in the info structure is targeted.
      
      We can eliminate the unnecessary complexity by deleting the cross-chip
      notifier logic and calling the ds->ops straight from port.c.
      
      Cc: Horatiu Vultur <horatiu.vultur@microchip.com>
      Signed-off-by: default avatarVladimir Oltean <vladimir.oltean@nxp.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      cad69019
    • Vladimir Oltean's avatar
      net: dsa: fix incorrect function pointer check for MRP ring roles · ff91e1b6
      Vladimir Oltean authored
      The cross-chip notifier boilerplate code meant to check the presence of
      ds->ops->port_mrp_add_ring_role before calling it, but checked
      ds->ops->port_mrp_add instead, before calling
      ds->ops->port_mrp_add_ring_role.
      
      Therefore, a driver which implements one operation but not the other
      would trigger a NULL pointer dereference.
      
      There isn't any such driver in DSA yet, so there is no reason to
      backport the change. Issue found through code inspection.
      
      Cc: Horatiu Vultur <horatiu.vultur@microchip.com>
      Fixes: c595c433
      
       ("net: dsa: add MRP support")
      Signed-off-by: default avatarVladimir Oltean <vladimir.oltean@nxp.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      ff91e1b6
    • Danielle Ratson's avatar
      mlxsw: pci: Avoid flow control for EMAD packets · d43e4271
      Danielle Ratson authored
      
      
      Locally generated packets ingress the device through its CPU port. When
      the CPU port is congested and there are not enough credits in its
      headroom buffer, packets can be dropped.
      
      While this might be acceptable for data packets that traverse the
      network, configuration packets exchanged between the host and the device
      (EMADs) should not be subjected to this flow control.
      
      The "sdq_lp" bit in the SDQ (Send Descriptor Queue) context allows the
      host to instruct the device to treat packets sent on this queue as
      "local processing" and always process them, regardless of the state of
      the CPU port's headroom.
      
      Add the definition of this bit and set it for the dedicated SDQ reserved
      for the transmission of EMAD packets. This makes the "local processing"
      bit in the WQE (Work Queue Element) redundant, so clear it.
      
      Signed-off-by: default avatarDanielle Ratson <danieller@nvidia.com>
      Signed-off-by: default avatarIdo Schimmel <idosch@nvidia.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      d43e4271