net: stmmac: dwmac-visconti: Fix clock configuration for RMII mode
[ Upstream commit 0959bc4b ] Bit pattern of the ETHER_CLOCK_SEL register for RMII/MII mode should be fixed. Also, some control bits should be modified with a specific sequence. Fixes: b38dd98f ("net: stmmac: Add Toshiba Visconti SoCs glue driver") Signed-off-by:Yuji Ishikawa <yuji2.ishikawa@toshiba.co.jp> Reviewed-by:
Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp> Signed-off-by:
David S. Miller <davem@davemloft.net> Signed-off-by:
Sasha Levin <sashal@kernel.org>
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1b5bf52e
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