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Commit 0959bc4b authored by Yuji Ishikawa's avatar Yuji Ishikawa Committed by David S. Miller
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net: stmmac: dwmac-visconti: Fix clock configuration for RMII mode

Bit pattern of the ETHER_CLOCK_SEL register for RMII/MII mode should be fixed.
Also, some control bits should be modified with a specific sequence.

Fixes: b38dd98f

 ("net: stmmac: Add Toshiba Visconti SoCs glue driver")
Signed-off-by: default avatarYuji Ishikawa <yuji2.ishikawa@toshiba.co.jp>
Reviewed-by: default avatarNobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 1ba1a4a9
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