riscv: dts: jh7110: Add clock source from PLL
Change the PLL clock source from syscrg to sys_syscon child node. Signed-off-by:Xingyu Wu <xingyu.wu@starfivetech.com> Signed-off-by:
Hal Feng <hal.feng@starfivetech.com> Reviewed-by:
Torsten Duwe <duwe@suse.de> Reviewed-by:
Leo Yu-Chi Liang <ycliang@andestech.com>
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