Commit e51b4198 authored by Joerg Roedel's avatar Joerg Roedel
Browse files

Merge branches 'iommu/fixes', 'arm/allwinner', 'arm/exynos', 'arm/mediatek',... 

Merge branches 'iommu/fixes', 'arm/allwinner', 'arm/exynos', 'arm/mediatek', 'arm/omap', 'arm/renesas', 'arm/rockchip', 'arm/smmu', 'ppc/pamu', 'unisoc', 'x86/vt-d', 'x86/amd', 'core' and 'platform-remove_new' into next
parents ccc62b82 08632365 5e799a7c f5430284 0c043164 b67ab6fb 25c23255 391d0feb 829a7955 816c698c e60d63e3 f5944964 f7f9c054 421b6093

Documentation/ABI/testing/sysfs-kernel-iommu_groups

+0 −1
Original line number Diff line number Diff line
@@ -53,7 +53,6 @@ Description: /sys/kernel/iommu_groups/<grp_id>/type shows the type of default 


		The default domain type of a group may be modified only when



		- The group has only one device.

		- The device in the group is not bound to any device driver.

		  So, the users must unbind the appropriate driver before

		  changing the default domain type.

Documentation/devicetree/bindings/iommu/arm,smmu.yaml

+41 −4
Original line number Diff line number Diff line
@@ -53,6 +53,7 @@ properties: 
              - qcom,sm8250-smmu-500

              - qcom,sm8350-smmu-500

              - qcom,sm8450-smmu-500

              - qcom,sm8550-smmu-500

          - const: qcom,smmu-500

          - const: arm,mmu-500
@@ -75,9 +76,22 @@ properties: 
              - qcom,sm8350-smmu-500

              - qcom,sm8450-smmu-500

          - const: arm,mmu-500



      - description: Qcom Adreno GPUs implementing "arm,smmu-500"

      - description: Qcom Adreno GPUs implementing "qcom,smmu-500" and "arm,mmu-500"

        items:

          - enum:

              - qcom,sc7280-smmu-500

              - qcom,sm6115-smmu-500

              - qcom,sm6125-smmu-500

              - qcom,sm8150-smmu-500

              - qcom,sm8250-smmu-500

              - qcom,sm8350-smmu-500

          - const: qcom,adreno-smmu

          - const: qcom,smmu-500

          - const: arm,mmu-500

      - description: Qcom Adreno GPUs implementing "arm,mmu-500" (legacy binding)

        deprecated: true

        items:

          # Do not add additional SoC to this list. Instead use previous list.

          - enum:

              - qcom,sc7280-smmu-500

              - qcom,sm8150-smmu-500
@@ -364,6 +378,30 @@ allOf: 
            - description: interface clock required to access smmu's registers

                through the TCU's programming interface.



  - if:

      properties:

        compatible:

          items:

            - enum:

                - qcom,sm6115-smmu-500

                - qcom,sm6125-smmu-500

            - const: qcom,adreno-smmu

            - const: qcom,smmu-500

            - const: arm,mmu-500

    then:

      properties:

        clock-names:

          items:

            - const: mem

            - const: hlos

            - const: iface



        clocks:

          items:

            - description: GPU memory bus clock

            - description: Voter clock required for HLOS SMMU access

            - description: Interface clock required for register access



  # Disallow clocks for all other platforms with specific compatibles

  - if:

      properties:
@@ -383,12 +421,11 @@ allOf: 
              - qcom,sdm845-smmu-500

              - qcom,sdx55-smmu-500

              - qcom,sdx65-smmu-500

              - qcom,sm6115-smmu-500

              - qcom,sm6125-smmu-500

              - qcom,sm6350-smmu-500

              - qcom,sm6375-smmu-500

              - qcom,sm8350-smmu-500

              - qcom,sm8450-smmu-500

              - qcom,sm8550-smmu-500

    then:

      properties:

        clock-names: false

Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.yaml

+24 −8
Original line number Diff line number Diff line
@@ -74,16 +74,16 @@ properties: 
  renesas,ipmmu-main:

    $ref: /schemas/types.yaml#/definitions/phandle-array

    items:

      - items:

      - minItems: 1

        items:

          - description: phandle to main IPMMU

          - description: the interrupt bit number associated with the particular

              cache IPMMU device. The interrupt bit number needs to match the main

              IPMMU IMSSTR register. Only used by cache IPMMU instances.

          - description:

              The interrupt bit number associated with the particular cache

              IPMMU device. If present, the interrupt bit number needs to match

              the main IPMMU IMSSTR register. Only used by cache IPMMU

              instances.

    description:

      Reference to the main IPMMU phandle plus 1 cell. The cell is

      the interrupt bit number associated with the particular cache IPMMU

      device. The interrupt bit number needs to match the main IPMMU IMSSTR

      register. Only used by cache IPMMU instances.

      Reference to the main IPMMU.



required:

  - compatible
@@ -109,6 +109,22 @@ allOf: 
      required:

        - power-domains



  - if:

      properties:

        compatible:

          contains:

            const: renesas,rcar-gen4-ipmmu-vmsa

    then:

      properties:

        renesas,ipmmu-main:

          items:

            - maxItems: 1

    else:

      properties:

        renesas,ipmmu-main:

          items:

            - minItems: 2



examples:

  - |

    #include <dt-bindings/clock/r8a7791-cpg-mssr.h>

Documentation/devicetree/bindings/media/mediatek,mt8195-jpegdec.yaml

+0 −7
Original line number Diff line number Diff line
@@ -26,11 +26,6 @@ properties: 
      Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml for details.

      Ports are according to the HW.



  dma-ranges:

    maxItems: 1

    description: |

      Describes the physical address space of IOMMU maps to memory.



  "#address-cells":

    const: 2
@@ -89,7 +84,6 @@ required: 
  - compatible

  - power-domains

  - iommus

  - dma-ranges

  - ranges



additionalProperties: false
@@ -115,7 +109,6 @@ examples: 
                     <&iommu_vpp M4U_PORT_L19_JPGDEC_BSDMA1>,

                     <&iommu_vpp M4U_PORT_L19_JPGDEC_BUFF_OFFSET1>,

                     <&iommu_vpp M4U_PORT_L19_JPGDEC_BUFF_OFFSET0>;

            dma-ranges = <0x1 0x0 0x0 0x40000000 0x0 0xfff00000>;

            #address-cells = <2>;

            #size-cells = <2>;

            ranges;

Documentation/devicetree/bindings/media/mediatek,mt8195-jpegenc.yaml

+0 −7
Original line number Diff line number Diff line
@@ -26,11 +26,6 @@ properties: 
      Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml for details.

      Ports are according to the HW.



  dma-ranges:

    maxItems: 1

    description: |

      Describes the physical address space of IOMMU maps to memory.



  "#address-cells":

    const: 2
@@ -89,7 +84,6 @@ required: 
  - compatible

  - power-domains

  - iommus

  - dma-ranges

  - ranges



additionalProperties: false
@@ -113,7 +107,6 @@ examples: 
                     <&iommu_vpp M4U_PORT_L20_JPGENC_C_RDMA>,

                     <&iommu_vpp M4U_PORT_L20_JPGENC_Q_TABLE>,

                     <&iommu_vpp M4U_PORT_L20_JPGENC_BSDMA>;

            dma-ranges = <0x1 0x0 0x0 0x40000000 0x0 0xfff00000>;

            #address-cells = <2>;

            #size-cells = <2>;

            ranges;