Commit c6eafee0 authored by Alex Deucher's avatar Alex Deucher
Browse files

Revert "Revert "drm/amdgpu/gmc11: enable AGP aperture""



This reverts commit 1a65327a.

This should be resolved so we can re-enable this. Also,
the AGP apeture was bring programmed to 0 on MMHUB 3.0.1
since agp_start and end were not being set.

Acked-by: default avatarHarry Wentland <harry.wentland@amd.com>
Reviewed-by: default avatarYifan Zhang <yifan1.zhang@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 0294868f
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+4 −3
Original line number Diff line number Diff line
@@ -151,10 +151,11 @@ static void gfxhub_v3_0_init_system_aperture_regs(struct amdgpu_device *adev)
{
	uint64_t value;

	/* Disable AGP. */
	/* Program the AGP BAR */
	WREG32_SOC15(GC, 0, regGCMC_VM_AGP_BASE, 0);
	WREG32_SOC15(GC, 0, regGCMC_VM_AGP_TOP, 0);
	WREG32_SOC15(GC, 0, regGCMC_VM_AGP_BOT, 0x00FFFFFF);
	WREG32_SOC15(GC, 0, regGCMC_VM_AGP_BOT, adev->gmc.agp_start >> 24);
	WREG32_SOC15(GC, 0, regGCMC_VM_AGP_TOP, adev->gmc.agp_end >> 24);


	/* Program the system aperture low logical page number. */
	WREG32_SOC15(GC, 0, regGCMC_VM_SYSTEM_APERTURE_LOW_ADDR,
+1 −0
Original line number Diff line number Diff line
@@ -673,6 +673,7 @@ static void gmc_v11_0_vram_gtt_location(struct amdgpu_device *adev,

	amdgpu_gmc_vram_location(adev, &adev->gmc, base);
	amdgpu_gmc_gart_location(adev, mc);
	amdgpu_gmc_agp_location(adev, mc);

	/* base offset of vram pages */
	if (amdgpu_sriov_vf(adev))
+4 −3
Original line number Diff line number Diff line
@@ -177,10 +177,11 @@ static void mmhub_v3_0_init_system_aperture_regs(struct amdgpu_device *adev)
	 * these regs, and they will be programed at host.
	 * so skip programing these regs.
	 */
	/* Disable AGP. */
	/* Program the AGP BAR */
	WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_BASE, 0);
	WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_TOP, 0);
	WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_BOT, 0x00FFFFFF);
	WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_BOT, adev->gmc.agp_start >> 24);
	WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_TOP, adev->gmc.agp_end >> 24);

	/* Program the system aperture low logical page number. */
	WREG32_SOC15(MMHUB, 0, regMMMC_VM_SYSTEM_APERTURE_LOW_ADDR,
		     adev->gmc.vram_start >> 18);
+3 −3
Original line number Diff line number Diff line
@@ -162,10 +162,10 @@ static void mmhub_v3_0_2_init_system_aperture_regs(struct amdgpu_device *adev)
	uint64_t value;
	uint32_t tmp;

	/* Disable AGP. */
	/* Program the AGP BAR */
	WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_BASE, 0);
	WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_TOP, 0);
	WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_BOT, 0x00FFFFFF);
	WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_BOT, adev->gmc.agp_start >> 24);
	WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_TOP, adev->gmc.agp_end >> 24);

	if (!amdgpu_sriov_vf(adev)) {
		/*