Commit 1a65327a authored by Chengming Gui's avatar Chengming Gui Committed by Alex Deucher
Browse files

Revert "drm/amdgpu/gmc11: enable AGP aperture"



This reverts commit 2cfe34e1.
Enable AGP aperture cause SDMA page fault for gfx11.0.2,
so temp disable AGP aperture until SDMA FW resolved this.

Reviewed-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: default avatarJack Gui <Jack.Gui@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 272308ad
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+3 −4
Original line number Diff line number Diff line
@@ -154,11 +154,10 @@ static void gfxhub_v3_0_init_system_aperture_regs(struct amdgpu_device *adev)
{
	uint64_t value;

	/* Program the AGP BAR */
	/* Disable AGP. */
	WREG32_SOC15(GC, 0, regGCMC_VM_AGP_BASE, 0);
	WREG32_SOC15(GC, 0, regGCMC_VM_AGP_BOT, adev->gmc.agp_start >> 24);
	WREG32_SOC15(GC, 0, regGCMC_VM_AGP_TOP, adev->gmc.agp_end >> 24);

	WREG32_SOC15(GC, 0, regGCMC_VM_AGP_TOP, 0);
	WREG32_SOC15(GC, 0, regGCMC_VM_AGP_BOT, 0x00FFFFFF);

	/* Program the system aperture low logical page number. */
	WREG32_SOC15(GC, 0, regGCMC_VM_SYSTEM_APERTURE_LOW_ADDR,
+0 −1
Original line number Diff line number Diff line
@@ -611,7 +611,6 @@ static void gmc_v11_0_vram_gtt_location(struct amdgpu_device *adev,

	amdgpu_gmc_vram_location(adev, &adev->gmc, base);
	amdgpu_gmc_gart_location(adev, mc);
	amdgpu_gmc_agp_location(adev, mc);

	/* base offset of vram pages */
	adev->vm_manager.vram_base_offset = adev->mmhub.funcs->get_mc_fb_offset(adev);
+3 −3
Original line number Diff line number Diff line
@@ -169,10 +169,10 @@ static void mmhub_v3_0_init_system_aperture_regs(struct amdgpu_device *adev)
	uint64_t value;
	uint32_t tmp;

	/* Program the AGP BAR */
	/* Disable AGP. */
	WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_BASE, 0);
	WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_BOT, adev->gmc.agp_start >> 24);
	WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_TOP, adev->gmc.agp_end >> 24);
	WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_TOP, 0);
	WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_BOT, 0x00FFFFFF);

	if (!amdgpu_sriov_vf(adev)) {
		/*
+3 −3
Original line number Diff line number Diff line
@@ -162,10 +162,10 @@ static void mmhub_v3_0_2_init_system_aperture_regs(struct amdgpu_device *adev)
	uint64_t value;
	uint32_t tmp;

	/* Program the AGP BAR */
	/* Disable AGP. */
	WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_BASE, 0);
	WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_BOT, adev->gmc.agp_start >> 24);
	WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_TOP, adev->gmc.agp_end >> 24);
	WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_TOP, 0);
	WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_BOT, 0x00FFFFFF);

	if (!amdgpu_sriov_vf(adev)) {
		/*