Commit ac409ada authored by Krzysztof Kozlowski's avatar Krzysztof Kozlowski
Browse files

Merge branch 'for-v6.4/clk-exynos850-dt-binding' into next/clk 



Merge Devicetree bindings with new Exynos850 clock IDs (headers), used
also by the clock drivers.

Signed-off-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
parents a4c78367 284f6dcb

Documentation/devicetree/bindings/clock/samsung,exynos850-clock.yaml

+19 −0
Original line number Diff line number Diff line
@@ -37,6 +37,7 @@ properties: 
      - samsung,exynos850-cmu-cmgp

      - samsung,exynos850-cmu-core

      - samsung,exynos850-cmu-dpu

      - samsung,exynos850-cmu-g3d

      - samsung,exynos850-cmu-hsi

      - samsung,exynos850-cmu-is

      - samsung,exynos850-cmu-mfcmscl
@@ -169,6 +170,24 @@ allOf: 
            - const: oscclk

            - const: dout_dpu



  - if:

      properties:

        compatible:

          contains:

            const: samsung,exynos850-cmu-g3d



    then:

      properties:

        clocks:

          items:

            - description: External reference clock (26 MHz)

            - description: G3D clock (from CMU_TOP)



        clock-names:

          items:

            - const: oscclk

            - const: dout_g3d_switch



  - if:

      properties:

        compatible:

include/dt-bindings/clock/exynos850.h

+25 −3
Original line number Diff line number Diff line
@@ -85,7 +85,10 @@ 
#define CLK_DOUT_MFCMSCL_M2M		73

#define CLK_DOUT_MFCMSCL_MCSC		74

#define CLK_DOUT_MFCMSCL_JPEG		75

#define TOP_NR_CLK			76

#define CLK_MOUT_G3D_SWITCH		76

#define CLK_GOUT_G3D_SWITCH		77

#define CLK_DOUT_G3D_SWITCH		78

#define TOP_NR_CLK			79



/* CMU_APM */

#define CLK_RCO_I3C_PMIC		1
@@ -175,7 +178,8 @@ 
#define IOCLK_AUDIOCDCLK5		58

#define IOCLK_AUDIOCDCLK6		59

#define TICK_USB			60

#define AUD_NR_CLK			61

#define CLK_GOUT_AUD_CMU_AUD_PCLK	61

#define AUD_NR_CLK			62



/* CMU_CMGP */

#define CLK_RCO_CMGP			1
@@ -195,6 +199,21 @@ 
#define CLK_GOUT_SYSREG_CMGP_PCLK	15

#define CMGP_NR_CLK			16



/* CMU_G3D */

#define CLK_FOUT_G3D_PLL		1

#define CLK_MOUT_G3D_PLL		2

#define CLK_MOUT_G3D_SWITCH_USER	3

#define CLK_MOUT_G3D_BUSD		4

#define CLK_DOUT_G3D_BUSP		5

#define CLK_GOUT_G3D_CMU_G3D_PCLK	6

#define CLK_GOUT_G3D_GPU_CLK		7

#define CLK_GOUT_G3D_TZPC_PCLK		8

#define CLK_GOUT_G3D_GRAY2BIN_CLK	9

#define CLK_GOUT_G3D_BUSD_CLK		10

#define CLK_GOUT_G3D_BUSP_CLK		11

#define CLK_GOUT_G3D_SYSREG_PCLK	12

#define G3D_NR_CLK			13



/* CMU_HSI */

#define CLK_MOUT_HSI_BUS_USER		1

#define CLK_MOUT_HSI_MMC_CARD_USER	2
@@ -209,7 +228,10 @@ 
#define CLK_GOUT_MMC_CARD_ACLK		11

#define CLK_GOUT_MMC_CARD_SDCLKIN	12

#define CLK_GOUT_SYSREG_HSI_PCLK	13

#define HSI_NR_CLK			14

#define CLK_GOUT_HSI_PPMU_ACLK		14

#define CLK_GOUT_HSI_PPMU_PCLK		15

#define CLK_GOUT_HSI_CMU_HSI_PCLK	16

#define HSI_NR_CLK			17



/* CMU_IS */

#define CLK_MOUT_IS_BUS_USER		1