Commit a4c78367 authored by Sam Protsenko's avatar Sam Protsenko Committed by Krzysztof Kozlowski
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clk: samsung: Set dev in samsung_clk_init()



Some drivers set dev to context in order to implement PM. Make that part
of samsung_clk_init() instead of assigning `ctx->dev = dev' separately.

No functional change.

Acked-by: default avatarMarek Szyprowski <m.szyprowski@samsung.com>
Tested-by: default avatarMarek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: default avatarSam Protsenko <semen.protsenko@linaro.org>
Link: https://lore.kernel.org/r/20230223041938.22732-4-semen.protsenko@linaro.org


Signed-off-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
parent 65bf1fbe
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+1 −1
Original line number Diff line number Diff line
@@ -1251,7 +1251,7 @@ static void __init exynos4_clk_init(struct device_node *np,
	if (!reg_base)
		panic("%s: failed to map registers\n", __func__);

	ctx = samsung_clk_init(reg_base, CLK_NR_CLKS);
	ctx = samsung_clk_init(NULL, reg_base, CLK_NR_CLKS);
	hws = ctx->clk_data.hws;

	samsung_clk_of_register_fixed_ext(ctx, exynos4_fixed_rate_ext_clks,
+1 −2
Original line number Diff line number Diff line
@@ -121,8 +121,7 @@ static int __init exynos4x12_isp_clk_probe(struct platform_device *pdev)
	if (!exynos4x12_save_isp)
		return -ENOMEM;

	ctx = samsung_clk_init(reg_base, CLK_NR_ISP_CLKS);
	ctx->dev = dev;
	ctx = samsung_clk_init(dev, reg_base, CLK_NR_ISP_CLKS);

	platform_set_drvdata(pdev, ctx);

+1 −1
Original line number Diff line number Diff line
@@ -797,7 +797,7 @@ static void __init exynos5250_clk_init(struct device_node *np)
		panic("%s: unable to determine soc\n", __func__);
	}

	ctx = samsung_clk_init(reg_base, CLK_NR_CLKS);
	ctx = samsung_clk_init(NULL, reg_base, CLK_NR_CLKS);
	hws = ctx->clk_data.hws;

	samsung_clk_of_register_fixed_ext(ctx, exynos5250_fixed_rate_ext_clks,
+1 −1
Original line number Diff line number Diff line
@@ -1587,7 +1587,7 @@ static void __init exynos5x_clk_init(struct device_node *np,

	exynos5x_soc = soc;

	ctx = samsung_clk_init(reg_base, CLK_NR_CLKS);
	ctx = samsung_clk_init(NULL, reg_base, CLK_NR_CLKS);
	hws = ctx->clk_data.hws;

	samsung_clk_of_register_fixed_ext(ctx, exynos5x_fixed_rate_ext_clks,
+1 −1
Original line number Diff line number Diff line
@@ -405,7 +405,7 @@ void __init s3c64xx_clk_init(struct device_node *np, unsigned long xtal_f,
			panic("%s: failed to map registers\n", __func__);
	}

	ctx = samsung_clk_init(reg_base, NR_CLKS);
	ctx = samsung_clk_init(NULL, reg_base, NR_CLKS);
	hws = ctx->clk_data.hws;

	/* Register external clocks. */
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