perf: hisi: Add support for HiSilicon SoC L3T PMU driver

ascend inclusion
category: feature
bugzilla: https://gitee.com/openeuler/kernel/issues/I4D4WR


CVE: NA

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This patch adds support for L3T PMU driver in HiSilicon SoC chip, Each
L3T has own control, counter and interrupt registers and is an separate
PMU. For each L3T PMU, it has 8-programable counters and each counter
is free-running.

Signed-off-by: Fang Lijun <fanglijun3@huawei.com>
Reviewed-by: Hanjun Guo <guohanjun@huawei.com>
Signed-off-by: Yang Yingliang <yangyingliang@huawei.com>