Unverified Commit 4a17dc41 authored by Arnd Bergmann's avatar Arnd Bergmann
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Merge tag 'renesas-arm-dt-for-v5.19-tag2' of...

Merge tag 'renesas-arm-dt-for-v5.19-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt

Renesas ARM DT updates for v5.19 (take two)

  - I2C, sound, USB, CANFD, timer, watchdog, (Q)SPI, cpufreq, and
    thermal support for the RZ/G2UL SoC and the RZ/G2UL SMARC EVK
    development board,
  - Initial support for the R-Car V4H SoC and the Renesas White Hawk
    development board stack,
  - DMA, RTC, and USB support for the RZ/N1D SoC,
  - Initial support for the RZ/V2M SoC an the RZ/V2M Evaluation Kit
    Board,
  - Miscellaneous fixes and improvements.

* tag 'renesas-arm-dt-for-v5.19-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (40 commits)
  arm64: dts: renesas: Add initial device tree for RZ/V2M EVK
  arm64: dts: renesas: Add initial DTSI for RZ/V2M SoC
  arm64: dts: renesas: r8a779a0: Update to R-Car Gen4 compatible values
  ARM: dts: r9a06g032: Link the PCI USB devices to the USB PHY
  ARM: dts: r9a06g032: Add USB PHY DT support
  ARM: dts: r9a06g032: Add internal PCI bridge node
  ARM: dts: r9a06g032: Describe the RTC
  arm64: dts: renesas: Add interrupt-names to CANFD nodes
  arm64: dts: renesas: r9a07g043: Add SPI Multi I/O Bus controller node
  arm64: dts: renesas: r9a07g043: Create thermal zone to support IPA
  arm64: dts: renesas: r9a07g043: Add TSU node
  arm64: dts: renesas: r9a07g043: Add OPP table
  arm64: dts: renesas: r9a07g043: Add RSPI{0,1,2} nodes
  arm64: dts: renesas: r9a07g054: Fix external clk node names
  arm64: dts: renesas: r9a07g044: Fix external clk node names
  ARM: dts: r9a06g032: Fix the NAND controller node
  ARM: dts: r9a06g032: Fill the UART DMA properties
  ARM: dts: r9a06g032: Describe the DMA router
  ARM: dts: r9a06g032: Add the two DMA nodes
  arm64: dts: renesas: Remove empty rgb output endpoints
  ...

Link: https://lore.kernel.org/r/cover.1651828603.git.geert+renesas@glider.be


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 2367ee1a ad1bd2bf
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+110 −0
Original line number Diff line number Diff line
@@ -66,6 +66,19 @@
		interrupt-parent = <&gic>;
		ranges;

		rtc0: rtc@40006000 {
			compatible = "renesas,r9a06g032-rtc", "renesas,rzn1-rtc";
			reg = <0x40006000 0x1000>;
			interrupts = <GIC_SPI 66 IRQ_TYPE_EDGE_RISING>,
				     <GIC_SPI 67 IRQ_TYPE_EDGE_RISING>,
				     <GIC_SPI 68 IRQ_TYPE_EDGE_RISING>;
			interrupt-names = "alarm", "timer", "pps";
			clocks = <&sysctrl R9A06G032_HCLK_RTC>;
			clock-names = "hclk";
			power-domains = <&sysctrl>;
			status = "disabled";
		};

		wdt0: watchdog@40008000 {
			compatible = "renesas,r9a06g032-wdt", "renesas,rzn1-wdt";
			reg = <0x40008000 0x1000>;
@@ -87,10 +100,62 @@
			reg = <0x4000c000 0x1000>;
			status = "okay";
			#clock-cells = <1>;
			#power-domain-cells = <0>;

			clocks = <&ext_mclk>, <&ext_rtc_clk>,
					<&ext_jtag_clk>, <&ext_rgmii_ref>;
			clock-names = "mclk", "rtc", "jtag", "rgmii_ref_ext";
			#address-cells = <1>;
			#size-cells = <1>;

			dmamux: dma-router@a0 {
				compatible = "renesas,rzn1-dmamux";
				reg = <0xa0 4>;
				#dma-cells = <6>;
				dma-requests = <32>;
				dma-masters = <&dma0 &dma1>;
			};
		};

		pci_usb: pci@40030000 {
			compatible = "renesas,pci-r9a06g032", "renesas,pci-rzn1";
			device_type = "pci";
			clocks = <&sysctrl R9A06G032_HCLK_USBH>,
				 <&sysctrl R9A06G032_HCLK_USBPM>,
				 <&sysctrl R9A06G032_CLK_PCI_USB>;
			clock-names = "hclkh", "hclkpm", "pciclk";
			power-domains = <&sysctrl>;
			reg = <0x40030000 0xc00>,
			      <0x40020000 0x1100>;
			interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
			status = "disabled";

			bus-range = <0 0>;
			#address-cells = <3>;
			#size-cells = <2>;
			#interrupt-cells = <1>;
			ranges = <0x02000000 0 0x40020000 0x40020000 0 0x00010000>;
			/* Should map all possible DDR as inbound ranges, but
			 * the IP only supports a 256MB, 512MB, or 1GB window.
			 * flags, PCI addr (64-bit), CPU addr, PCI size (64-bit)
			 */
			dma-ranges = <0x42000000 0 0x80000000 0x80000000 0 0x40000000>;
			interrupt-map-mask = <0xf800 0 0 0x7>;
			interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH
					 0x0800 0 0 1 &gic GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH
					 0x1000 0 0 2 &gic GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;

			usb@1,0 {
				reg = <0x800 0 0 0 0>;
				phys = <&usbphy>;
				phy-names = "usb";
			};

			usb@2,0 {
				reg = <0x1000 0 0 0 0>;
				phys = <&usbphy>;
				phy-names = "usb";
			};
		};

		uart0: serial@40060000 {
@@ -134,6 +199,8 @@
			reg-io-width = <4>;
			clocks = <&sysctrl R9A06G032_CLK_UART3>, <&sysctrl R9A06G032_HCLK_UART3>;
			clock-names = "baudclk", "apb_pclk";
			dmas =  <&dmamux 0 0 0 0 0 1>, <&dmamux 1 0 0 0 1 1>;
			dma-names = "rx", "tx";
			status = "disabled";
		};

@@ -145,6 +212,8 @@
			reg-io-width = <4>;
			clocks = <&sysctrl R9A06G032_CLK_UART4>, <&sysctrl R9A06G032_HCLK_UART4>;
			clock-names = "baudclk", "apb_pclk";
			dmas =  <&dmamux 2 0 0 0 2 1>, <&dmamux 3 0 0 0 3 1>;
			dma-names = "rx", "tx";
			status = "disabled";
		};

@@ -156,6 +225,8 @@
			reg-io-width = <4>;
			clocks = <&sysctrl R9A06G032_CLK_UART5>, <&sysctrl R9A06G032_HCLK_UART5>;
			clock-names = "baudclk", "apb_pclk";
			dmas =  <&dmamux 4 0 0 0 4 1>, <&dmamux 5 0 0 0 5 1>;
			dma-names = "rx", "tx";
			status = "disabled";
		};

@@ -167,6 +238,8 @@
			reg-io-width = <4>;
			clocks = <&sysctrl R9A06G032_CLK_UART6>, <&sysctrl R9A06G032_HCLK_UART6>;
			clock-names = "baudclk", "apb_pclk";
			dmas =  <&dmamux 6 0 0 0 6 1>, <&dmamux 7 0 0 0 7 1>;
			dma-names = "rx", "tx";
			status = "disabled";
		};

@@ -178,6 +251,8 @@
			reg-io-width = <4>;
			clocks = <&sysctrl R9A06G032_CLK_UART7>, <&sysctrl R9A06G032_HCLK_UART7>;
			clock-names = "baudclk", "apb_pclk";
			dmas =  <&dmamux 4 0 0 0 20 1>, <&dmamux 5 0 0 0 21 1>;
			dma-names = "rx", "tx";
			status = "disabled";
		};

@@ -195,11 +270,40 @@
			interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&sysctrl R9A06G032_HCLK_NAND>, <&sysctrl R9A06G032_CLK_NAND>;
			clock-names = "hclk", "eclk";
			power-domains = <&sysctrl>;
			#address-cells = <1>;
			#size-cells = <0>;
			status = "disabled";
		};

		dma0: dma-controller@40104000 {
			compatible = "renesas,r9a06g032-dma", "renesas,rzn1-dma";
			reg = <0x40104000 0x1000>;
			interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
			clock-names = "hclk";
			clocks = <&sysctrl R9A06G032_HCLK_DMA0>;
			dma-channels = <8>;
			dma-requests = <16>;
			dma-masters = <1>;
			#dma-cells = <3>;
			block_size = <0xfff>;
			data-width = <8>;
		};

		dma1: dma-controller@40105000 {
			compatible = "renesas,r9a06g032-dma", "renesas,rzn1-dma";
			reg = <0x40105000 0x1000>;
			interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
			clock-names = "hclk";
			clocks = <&sysctrl R9A06G032_HCLK_DMA1>;
			dma-channels = <8>;
			dma-requests = <16>;
			dma-masters = <1>;
			#dma-cells = <3>;
			block_size = <0xfff>;
			data-width = <8>;
		};

		gic: interrupt-controller@44101000 {
			compatible = "arm,gic-400", "arm,cortex-a7-gic";
			interrupt-controller;
@@ -224,4 +328,10 @@
			<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
			<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
	};

	usbphy: usb-phy {
		#phy-cells = <0>;
		compatible = "usb-nop-xceiv";
		status = "disabled";
	};
};
+4 −0
Original line number Diff line number Diff line
@@ -65,6 +65,8 @@ dtb-$(CONFIG_ARCH_R8A779A0) += r8a779a0-falcon.dtb

dtb-$(CONFIG_ARCH_R8A779F0) += r8a779f0-spider.dtb

dtb-$(CONFIG_ARCH_R8A779G0) += r8a779g0-white-hawk.dtb

dtb-$(CONFIG_ARCH_R8A77951) += r8a779m1-salvator-xs.dtb
dtb-$(CONFIG_ARCH_R8A77951) += r8a779m1-ulcb.dtb
dtb-$(CONFIG_ARCH_R8A77951) += r8a779m1-ulcb-kf.dtb
@@ -81,3 +83,5 @@ dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044c2-smarc.dtb
dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044l2-smarc.dtb

dtb-$(CONFIG_ARCH_R9A07G054) += r9a07g054l2-smarc.dtb

dtb-$(CONFIG_ARCH_R9A09G011) += r9a09g011-v2mevk2.dtb
+8 −2
Original line number Diff line number Diff line
@@ -272,9 +272,15 @@
	status = "okay";
};

&du_out_rgb {
&du {
	ports {
		port@0 {
			du_out_rgb: endpoint {
				remote-endpoint = <&rgb_panel>;
			};
		};
	};
};

&ehci0 {
	dr_mode = "otg";
+1 −1
Original line number Diff line number Diff line
@@ -285,7 +285,7 @@

	ports {
		port@0 {
			endpoint {
			du_out_rgb: endpoint {
				remote-endpoint = <&adv7123_in>;
			};
		};
+1 −1
Original line number Diff line number Diff line
@@ -356,7 +356,7 @@

	ports {
		port@0 {
			endpoint {
			du_out_rgb: endpoint {
				remote-endpoint = <&adv7123_in>;
			};
		};
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