Commit ad1bd2bf authored by Phil Edworthy's avatar Phil Edworthy Committed by Geert Uytterhoeven
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arm64: dts: renesas: Add initial device tree for RZ/V2M EVK 



Add basic support for RZ/V2M EVK (based on R9A09G011):
- memory
- External input clock
- UART

Signed-off-by: default avatarPhil Edworthy <phil.edworthy@renesas.com>
Reviewed-by: default avatarBiju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220503115557.53370-13-phil.edworthy@renesas.com


Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent fb1929b9

arch/arm64/boot/dts/renesas/Makefile

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Original line number Diff line number Diff line
@@ -83,3 +83,5 @@ dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044c2-smarc.dtb 
dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044l2-smarc.dtb



dtb-$(CONFIG_ARCH_R9A07G054) += r9a07g054l2-smarc.dtb



dtb-$(CONFIG_ARCH_R9A09G011) += r9a09g011-v2mevk2.dtb

arch/arm64/boot/dts/renesas/r9a09g011-v2mevk2.dts

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+44 −0
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// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

/*

 * Device Tree Source for the RZ/V2M (r9a09g011) Evaluation Kit Board

 *

 * Copyright (C) 2022 Renesas Electronics Corp.

 */



/dts-v1/;

#include "r9a09g011.dtsi"



/ {

	model = "RZ/V2M Evaluation Kit 2.0";

	compatible = "renesas,rzv2mevk2", "renesas,r9a09g011";



	aliases {

		serial0 = &uart0;

	};



	chosen {

		stdout-path = "serial0:115200n8";

	};



	memory@58000000 {

		device_type = "memory";

		/*

		 * first 1.25GiB is reserved for ISP Firmware,

		 * next 128MiB is reserved for secure area.

		 */

		reg = <0x0 0x58000000 0x0 0x28000000>;

	};



	memory@180000000 {

		device_type = "memory";

		reg = <0x1 0x80000000 0x0 0x80000000>;

	};

};



&extal_clk {

	clock-frequency = <48000000>;

};



&uart0 {

	status = "okay";

};