Commit 38776cc4 authored by Kan Liang's avatar Kan Liang Committed by Peter Zijlstra
Browse files

perf/x86/uncore: Correct the number of CHAs on SPR



The number of CHAs from the discovery table on some SPR variants is
incorrect, because of a firmware issue. An accurate number can be read
from the MSR UNC_CBO_CONFIG.

Fixes: 949b1138 ("perf/x86/intel/uncore: Add Sapphire Rapids server CHA support")
Reported-by: default avatarStephane Eranian <eranian@google.com>
Signed-off-by: default avatarKan Liang <kan.liang@linux.intel.com>
Signed-off-by: default avatarPeter Zijlstra (Intel) <peterz@infradead.org>
Tested-by: default avatarStephane Eranian <eranian@google.com>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20230508140206.283708-1-kan.liang@linux.intel.com
parent 3c845304
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+11 −0
Original line number Diff line number Diff line
@@ -6150,6 +6150,7 @@ static struct intel_uncore_type spr_uncore_mdf = {
};

#define UNCORE_SPR_NUM_UNCORE_TYPES		12
#define UNCORE_SPR_CHA				0
#define UNCORE_SPR_IIO				1
#define UNCORE_SPR_IMC				6
#define UNCORE_SPR_UPI				8
@@ -6460,12 +6461,22 @@ static int uncore_type_max_boxes(struct intel_uncore_type **types,
	return max + 1;
}

#define SPR_MSR_UNC_CBO_CONFIG		0x2FFE

void spr_uncore_cpu_init(void)
{
	struct intel_uncore_type *type;
	u64 num_cbo;

	uncore_msr_uncores = uncore_get_uncores(UNCORE_ACCESS_MSR,
						UNCORE_SPR_MSR_EXTRA_UNCORES,
						spr_msr_uncores);

	type = uncore_find_type_by_id(uncore_msr_uncores, UNCORE_SPR_CHA);
	if (type) {
		rdmsrl(SPR_MSR_UNC_CBO_CONFIG, num_cbo);
		type->num_boxes = num_cbo;
	}
	spr_uncore_iio_free_running.num_boxes = uncore_type_max_boxes(uncore_msr_uncores, UNCORE_SPR_IIO);
}