Commit 3c845304 authored by Like Xu's avatar Like Xu Committed by Peter Zijlstra
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perf/x86/intel: Save/restore cpuc->active_pebs_data_cfg when using guest PEBS 



After commit b752ea0c ("perf/x86/intel/ds: Flush PEBS DS when changing
PEBS_DATA_CFG"), the cpuc->pebs_data_cfg may save some bits that are not
supported by real hardware, such as PEBS_UPDATE_DS_SW. This would cause
the VMX hardware MSR switching mechanism to save/restore invalid values
for PEBS_DATA_CFG MSR, thus crashing the host when PEBS is used for guest.
Fix it by using the active host value from cpuc->active_pebs_data_cfg.

Fixes: b752ea0c ("perf/x86/intel/ds: Flush PEBS DS when changing PEBS_DATA_CFG")
Signed-off-by: default avatarLike Xu <likexu@tencent.com>
Signed-off-by: default avatarPeter Zijlstra (Intel) <peterz@infradead.org>
Reviewed-by: default avatarKan Liang <kan.liang@linux.intel.com>
Link: https://lore.kernel.org/r/20230517133808.67885-1-likexu@tencent.com
parent 44c026a7

arch/x86/events/intel/core.c

+1 −1
Original line number Diff line number Diff line
@@ -4074,7 +4074,7 @@ static struct perf_guest_switch_msr *intel_guest_get_msrs(int *nr, void *data) 
	if (x86_pmu.intel_cap.pebs_baseline) {

		arr[(*nr)++] = (struct perf_guest_switch_msr){

			.msr = MSR_PEBS_DATA_CFG,

			.host = cpuc->pebs_data_cfg,

			.host = cpuc->active_pebs_data_cfg,

			.guest = kvm_pmu->pebs_data_cfg,

		};

	}