Commit 25ea8ecf authored by Daniel Vetter's avatar Daniel Vetter
Browse files

Merge tag 'drm-msm-fixes-2021-01-07' of https://gitlab.freedesktop.org/drm/msm into drm-fixes 



A few misc fixes from Rob, mostly fallout from the locking rework that
landed in the merge window, plus a few smaller things.

Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
From: Rob Clark <robdclark@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/CAF6AEGtWMhzyD6kejmViZeZ+zfJxRvfq-R2t_zA+DcDiTxsYRQ@mail.gmail.com
parents 4e181ded 00fd44a1

drivers/gpu/drm/msm/adreno/a2xx_gpu.c

+4 −2
Original line number Diff line number Diff line
@@ -534,9 +534,11 @@ struct msm_gpu *a2xx_gpu_init(struct drm_device *dev) 


	if (!gpu->aspace) {

		dev_err(dev->dev, "No memory protection without MMU\n");

		if (!allow_vram_carveout) {

			ret = -ENXIO;

			goto fail;

		}

	}



	return gpu;

drivers/gpu/drm/msm/adreno/a3xx_gpu.c

+4 −2
Original line number Diff line number Diff line
@@ -564,9 +564,11 @@ struct msm_gpu *a3xx_gpu_init(struct drm_device *dev) 
		 * implement a cmdstream validator.

		 */

		DRM_DEV_ERROR(dev->dev, "No memory protection without IOMMU\n");

		if (!allow_vram_carveout) {

			ret = -ENXIO;

			goto fail;

		}

	}



	icc_path = devm_of_icc_get(&pdev->dev, "gfx-mem");

	ret = IS_ERR(icc_path);

drivers/gpu/drm/msm/adreno/a4xx_gpu.c

+4 −2
Original line number Diff line number Diff line
@@ -692,9 +692,11 @@ struct msm_gpu *a4xx_gpu_init(struct drm_device *dev) 
		 * implement a cmdstream validator.

		 */

		DRM_DEV_ERROR(dev->dev, "No memory protection without IOMMU\n");

		if (!allow_vram_carveout) {

			ret = -ENXIO;

			goto fail;

		}

	}



	icc_path = devm_of_icc_get(&pdev->dev, "gfx-mem");

	ret = IS_ERR(icc_path);

drivers/gpu/drm/msm/adreno/adreno_device.c

+4 −0
Original line number Diff line number Diff line
@@ -18,6 +18,10 @@ bool snapshot_debugbus = false; 
MODULE_PARM_DESC(snapshot_debugbus, "Include debugbus sections in GPU devcoredump (if not fused off)");

module_param_named(snapshot_debugbus, snapshot_debugbus, bool, 0600);



bool allow_vram_carveout = false;

MODULE_PARM_DESC(allow_vram_carveout, "Allow using VRAM Carveout, in place of IOMMU");

module_param_named(allow_vram_carveout, allow_vram_carveout, bool, 0600);



static const struct adreno_info gpulist[] = {

	{

		.rev   = ADRENO_REV(2, 0, 0, 0),

drivers/gpu/drm/msm/adreno/adreno_gpu.c

+12 −9
Original line number Diff line number Diff line
@@ -191,8 +191,6 @@ adreno_iommu_create_address_space(struct msm_gpu *gpu, 
		struct platform_device *pdev)

{

	struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);

	struct a6xx_gpu *a6xx_gpu = to_a6xx_gpu(adreno_gpu);

	struct io_pgtable_domain_attr pgtbl_cfg;

	struct iommu_domain *iommu;

	struct msm_mmu *mmu;

	struct msm_gem_address_space *aspace;
@@ -202,6 +200,10 @@ adreno_iommu_create_address_space(struct msm_gpu *gpu, 
	if (!iommu)

		return NULL;





	if (adreno_is_a6xx(adreno_gpu)) {

		struct a6xx_gpu *a6xx_gpu = to_a6xx_gpu(adreno_gpu);

		struct io_pgtable_domain_attr pgtbl_cfg;

		/*

		* This allows GPU to set the bus attributes required to use system

		* cache on behalf of the iommu page table walker.
@@ -210,6 +212,7 @@ adreno_iommu_create_address_space(struct msm_gpu *gpu, 
			pgtbl_cfg.quirks = IO_PGTABLE_QUIRK_ARM_OUTER_WBWA;

			iommu_domain_set_attr(iommu, DOMAIN_ATTR_IO_PGTABLE_CFG, &pgtbl_cfg);

		}

	}



	mmu = msm_iommu_new(&pdev->dev, iommu);

	if (IS_ERR(mmu)) {