Commit 00fd44a1 authored by Konrad Dybcio's avatar Konrad Dybcio Committed by Rob Clark
Browse files

drm/msm: Only enable A6xx LLCC code on A6xx 



Using this code on A5xx (and probably older too) causes a
smmu bug.

Fixes: 474dadb8 ("drm/msm/a6xx: Add support for using system cache(LLC)")
Signed-off-by: default avatarKonrad Dybcio <konrad.dybcio@somainline.org>
Tested-by: default avatarAngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Reviewed-by: default avatarJordan Crouse <jcrouse@codeaurora.org>
Reviewed-by: default avatarSai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>
Signed-off-by: default avatarRob Clark <robdclark@chromium.org>
parent 3f7759e7

drivers/gpu/drm/msm/adreno/adreno_gpu.c

+12 −9
Original line number Diff line number Diff line
@@ -191,8 +191,6 @@ adreno_iommu_create_address_space(struct msm_gpu *gpu, 
		struct platform_device *pdev)

{

	struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);

	struct a6xx_gpu *a6xx_gpu = to_a6xx_gpu(adreno_gpu);

	struct io_pgtable_domain_attr pgtbl_cfg;

	struct iommu_domain *iommu;

	struct msm_mmu *mmu;

	struct msm_gem_address_space *aspace;
@@ -202,6 +200,10 @@ adreno_iommu_create_address_space(struct msm_gpu *gpu, 
	if (!iommu)

		return NULL;





	if (adreno_is_a6xx(adreno_gpu)) {

		struct a6xx_gpu *a6xx_gpu = to_a6xx_gpu(adreno_gpu);

		struct io_pgtable_domain_attr pgtbl_cfg;

		/*

		* This allows GPU to set the bus attributes required to use system

		* cache on behalf of the iommu page table walker.
@@ -210,6 +212,7 @@ adreno_iommu_create_address_space(struct msm_gpu *gpu, 
			pgtbl_cfg.quirks = IO_PGTABLE_QUIRK_ARM_OUTER_WBWA;

			iommu_domain_set_attr(iommu, DOMAIN_ATTR_IO_PGTABLE_CFG, &pgtbl_cfg);

		}

	}



	mmu = msm_iommu_new(&pdev->dev, iommu);

	if (IS_ERR(mmu)) {

drivers/gpu/drm/msm/adreno/adreno_gpu.h

+5 −0
Original line number Diff line number Diff line
@@ -212,6 +212,11 @@ static inline int adreno_is_a540(struct adreno_gpu *gpu) 
	return gpu->revn == 540;

}



static inline bool adreno_is_a6xx(struct adreno_gpu *gpu)

{

	return ((gpu->revn < 700 && gpu->revn > 599));

}



static inline int adreno_is_a618(struct adreno_gpu *gpu)

{

       return gpu->revn == 618;