Commit 1cbca217 authored by Dave Jiang's avatar Dave Jiang Committed by Xiaochen Shen
Browse files

dmaengine: idxd: fix setup sequence for MSIXPERM table

mainline inclusion
from mainline-v5.14
commit d5c10e0f
category: bugfix
bugzilla: https://gitee.com/openeuler/intel-kernel/issues/I596WO


CVE: NA

Intel-SIG: commit d5c10e0f dmaengine: idxd: fix setup sequence for MSIXPERM table.
Incremental backporting patches for DSA/IAA on Intel Xeon platform.

--------------------------------

The MSIX permission table should be programmed BEFORE request_irq()
happens. This prevents any possibility of an interrupt happening before the
MSIX perm table is setup, however slight.

Fixes: 6df0e6c5 ("dmaengine: idxd: clear MSIX permission entry on shutdown")
Sign-off-by: default avatarDave Jiang <dave.jiang@intel.com>
Link: https://lore.kernel.org/r/162456741222.1138073.1298447364671237896.stgit@djiang5-desk3.ch.intel.com


Signed-off-by: default avatarVinod Koul <vkoul@kernel.org>
Signed-off-by: default avatarXiaochen Shen <xiaochen.shen@intel.com>
parent 4396ac9a
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