Commit fd4d1165 authored by Mark Brown's avatar Mark Brown Committed by Greg Kroah-Hartman
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ASoC: Fix WM8996 24.576MHz clock operation 



commit 37d5993c upstream.

Record the clock after the divider as that is what all SYSCLK users see.
Without this the other clock configuration in the device comes out at
half rate.

Signed-off-by: default avatarMark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@suse.de>
parent c5bebbd1
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