Commit dce080c4 authored by Thomas Gleixner's avatar Thomas Gleixner Committed by Jiri Slaby
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clk: spear3xx: Use proper control register offset



commit 15ebb052 upstream.

The control register is at offset 0x10, not 0x0. This is wreckaged
since commit 5df33a62 (SPEAr: Switch to common clock framework).

Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
Acked-by: default avatarViresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: default avatarMike Turquette <mturquette@linaro.org>
Signed-off-by: default avatarJiri Slaby <jslaby@suse.cz>
parent ccca5d34
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