smsc95xx: dynamically fix up TX buffer alignment with padding bytes

dwc_otg requires a 32-bit aligned buffer start address, otherwise
expensive bounce buffers are used. The LAN951x hardware can skip up to
3 bytes between the TX header and the start of frame data, which can
be used to force alignment of the URB passed to dwc_otg.

As found in https://github.com/raspberrypi/linux/issues/2924