Skip to content
Commit 796d1f4c authored by Tomasz Figa's avatar Tomasz Figa
Browse files

clk: samsung: exynos5250: Fix parents of gate clocks from GSCL domain



This patch adds mout_aclk266_gscl_sub mux clock and adjusts definitions
of GSCL domain gate clocks to use it as their parent, as specified in
SoC documentation.

Signed-off-by: default avatarTomasz Figa <t.figa@samsung.com>
Signed-off-by: default avatarKyungmin Park <kyungmin.park@samsung.com>
Tested-by: default avatarTomasz Figa <t.figa@samsung.com>
parent 38ee3754
0% or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment