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  1. Oct 24, 2014
    • Nadav Amit's avatar
      KVM: x86: Handle errors when RIP is set during far jumps · d1442d85
      Nadav Amit authored
      
      
      Far jmp/call/ret may fault while loading a new RIP.  Currently KVM does not
      handle this case, and may result in failed vm-entry once the assignment is
      done.  The tricky part of doing so is that loading the new CS affects the
      VMCS/VMCB state, so if we fail during loading the new RIP, we are left in
      unconsistent state.  Therefore, this patch saves on 64-bit the old CS
      descriptor and restores it if loading RIP failed.
      
      This fixes CVE-2014-3647.
      
      Cc: stable@vger.kernel.org
      Signed-off-by: default avatarNadav Amit <namit@cs.technion.ac.il>
      Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
      d1442d85
    • Nadav Amit's avatar
      KVM: x86: Emulator fixes for eip canonical checks on near branches · 234f3ce4
      Nadav Amit authored
      
      
      Before changing rip (during jmp, call, ret, etc.) the target should be asserted
      to be canonical one, as real CPUs do.  During sysret, both target rsp and rip
      should be canonical. If any of these values is noncanonical, a #GP exception
      should occur.  The exception to this rule are syscall and sysenter instructions
      in which the assigned rip is checked during the assignment to the relevant
      MSRs.
      
      This patch fixes the emulator to behave as real CPUs do for near branches.
      Far branches are handled by the next patch.
      
      This fixes CVE-2014-3647.
      
      Cc: stable@vger.kernel.org
      Signed-off-by: default avatarNadav Amit <namit@cs.technion.ac.il>
      Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
      234f3ce4
    • Nadav Amit's avatar
      KVM: x86: Fix wrong masking on relative jump/call · 05c83ec9
      Nadav Amit authored
      
      
      Relative jumps and calls do the masking according to the operand size, and not
      according to the address size as the KVM emulator does today.
      
      This patch fixes KVM behavior.
      
      Cc: stable@vger.kernel.org
      Signed-off-by: default avatarNadav Amit <namit@cs.technion.ac.il>
      Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
      05c83ec9
    • Andy Honig's avatar
      KVM: x86: Improve thread safety in pit · 2febc839
      Andy Honig authored
      
      
      There's a race condition in the PIT emulation code in KVM.  In
      __kvm_migrate_pit_timer the pit_timer object is accessed without
      synchronization.  If the race condition occurs at the wrong time this
      can crash the host kernel.
      
      This fixes CVE-2014-3611.
      
      Cc: stable@vger.kernel.org
      Signed-off-by: default avatarAndrew Honig <ahonig@google.com>
      Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
      2febc839
    • Andy Honig's avatar
      KVM: x86: Prevent host from panicking on shared MSR writes. · 8b3c3104
      Andy Honig authored
      
      
      The previous patch blocked invalid writes directly when the MSR
      is written.  As a precaution, prevent future similar mistakes by
      gracefulling handle GPs caused by writes to shared MSRs.
      
      Cc: stable@vger.kernel.org
      Signed-off-by: default avatarAndrew Honig <ahonig@google.com>
      [Remove parts obsoleted by Nadav's patch. - Paolo]
      Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
      8b3c3104
    • Nadav Amit's avatar
      KVM: x86: Check non-canonical addresses upon WRMSR · 854e8bb1
      Nadav Amit authored
      
      
      Upon WRMSR, the CPU should inject #GP if a non-canonical value (address) is
      written to certain MSRs. The behavior is "almost" identical for AMD and Intel
      (ignoring MSRs that are not implemented in either architecture since they would
      anyhow #GP). However, IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
      non-canonical address is written on Intel but not on AMD (which ignores the top
      32-bits).
      
      Accordingly, this patch injects a #GP on the MSRs which behave identically on
      Intel and AMD.  To eliminate the differences between the architecutres, the
      value which is written to IA32_SYSENTER_ESP and IA32_SYSENTER_EIP is turned to
      canonical value before writing instead of injecting a #GP.
      
      Some references from Intel and AMD manuals:
      
      According to Intel SDM description of WRMSR instruction #GP is expected on
      WRMSR "If the source register contains a non-canonical address and ECX
      specifies one of the following MSRs: IA32_DS_AREA, IA32_FS_BASE, IA32_GS_BASE,
      IA32_KERNEL_GS_BASE, IA32_LSTAR, IA32_SYSENTER_EIP, IA32_SYSENTER_ESP."
      
      According to AMD manual instruction manual:
      LSTAR/CSTAR (SYSCALL): "The WRMSR instruction loads the target RIP into the
      LSTAR and CSTAR registers.  If an RIP written by WRMSR is not in canonical
      form, a general-protection exception (#GP) occurs."
      IA32_GS_BASE and IA32_FS_BASE (WRFSBASE/WRGSBASE): "The address written to the
      base field must be in canonical form or a #GP fault will occur."
      IA32_KERNEL_GS_BASE (SWAPGS): "The address stored in the KernelGSbase MSR must
      be in canonical form."
      
      This patch fixes CVE-2014-3610.
      
      Cc: stable@vger.kernel.org
      Signed-off-by: default avatarNadav Amit <namit@cs.technion.ac.il>
      Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
      854e8bb1
  2. Oct 22, 2014
    • Linus Torvalds's avatar
      Merge branch 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/nab/target-pending · c3351dfa
      Linus Torvalds authored
      Pull SCSI target updates from Nicholas Bellinger:
       "Here are the target updates for v3.18-rc2 code.  These where
        originally destined for -rc1, but due to the combination of travel
        last week for KVM Forum and my mistake of taking the three week merge
        window literally, the pull request slipped..  Apologies for that.
      
        Things where reasonably quiet this round.  The highlights include:
      
         - New userspace backend driver (target_core_user.ko) by Shaohua Li
           and Andy Grover
         - A number of cleanups in target, iscsi-taret and qla_target code
           from Joern Engel
         - Fix an OOPs related to queue full handling with CHECK_CONDITION
           status from Quinn Tran
         - Fix to disable TX completion interrupt coalescing in iser-target,
           that was causing problems on some hardware
         - Fix for PR APTPL metadata handling with demo-mode ACLs
      
        I'm most excited about the new backend driver that uses UIO + shared
        memory ring to dispatch I/O and control commands into user-space.
        This was probably the most requested feature by users over the last
        couple of years, and opens up a new area of development + porting of
        existing user-space storage applications to LIO.  Thanks to Shaohua +
        Andy for making this happen.
      
        Also another honorable mention, a new Xen PV SCSI driver was merged
        via the xen/tip.git tree recently, which puts us now at 10 target
        drivers in upstream! Thanks to David Vrabel + Juergen Gross for their
        work to get this code merged"
      
      * 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/nab/target-pending: (40 commits)
        target/file: fix inclusive vfs_fsync_range() end
        iser-target: Disable TX completion interrupt coalescing
        target: Add force_pr_aptpl device attribute
        target: Fix APTPL metadata handling for dynamic MappedLUNs
        qla_target: don't delete changed nacls
        target/user: Recalculate pad size inside is_ring_space_avail()
        tcm_loop: Fixup tag handling
        iser-target: Fix smatch warning
        target/user: Fix up smatch warnings in tcmu_netlink_event
        target: Add a user-passthrough backstore
        target: Add documentation on the target userspace pass-through driver
        uio: Export definition of struct uio_device
        target: Remove unneeded check in sbc_parse_cdb
        target: Fix queue full status NULL pointer for SCF_TRANSPORT_TASK_SENSE
        qla_target: rearrange struct qla_tgt_prm
        qla_target: improve qlt_unmap_sg()
        qla_target: make some global functions static
        qla_target: remove unused parameter
        target: simplify core_tmr_abort_task
        target: encapsulate smp_mb__after_atomic()
        ...
      c3351dfa
    • Linus Torvalds's avatar
      Merge branch 'for-linus' of git://git.open-osd.org/linux-open-osd · 848a5528
      Linus Torvalds authored
      Pull email address change from Boaz Harrosh.
      
      * 'for-linus' of git://git.open-osd.org/linux-open-osd:
        Boaz Harrosh - fix email in Documentation
        Boaz Harrosh - Fix broken email address
        MAINTAINERS: Change Boaz Harrosh's email
      848a5528
    • Linus Torvalds's avatar
      Merge branch 'mailbox-for-linus' of git://git.linaro.org/landing-teams/working/fujitsu/integration · 43d451f1
      Linus Torvalds authored
      Pull mailbox framework from Jassi Brar:
       "A framework for Mailbox controllers and clients have been cooking for
        more than a year now.
      
        Everybody in the CC list had been copied on patchset revisions and
        most of them have made sounds of approval, though just one concrete
        Reviewed-by.  The patchset has also been in linux-next for a couple of
        weeks now and no conflict has been reported.  The framework has the
        backing of at least 5 platforms, though I can't say if/when they
        upstream their drivers (some businesses have 'changed')"
      
      (Further acked-by by Arnd Bergmann and Suman Anna in the pull request
      thread)
      
      * 'mailbox-for-linus' of git://git.linaro.org/landing-teams/working/fujitsu/integration:
        dt: mailbox: add generic bindings
        doc: add documentation for mailbox framework
        mailbox: Introduce framework for mailbox
        mailbox: rename pl320-ipc specific mailbox.h
      43d451f1
  3. Oct 21, 2014